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Design of a BFSK transmitter/receiver using Xilinx System Generator

I would like someone to comment my BFSK design as I am a student and not much experienced.

Reply to
kvoskaki
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We can try it. Please upload it to some web host (blog, free web hosting etc.), if it is long and post the link, or post the code (assuming you are using Verilog or VHDL) in this newsgroup, if it is not too long.

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
Reply to
Frank Buss

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