Design never finish routing?

Hi, there:

My design takes up a long time still not routed...

Here is the resources consumption and P&R log... How can I make it run faster? It is a simple 1-clock design, with 118 multipliers.

Selected Device : 2v6000bf957-6

Number of Slices: 19984 out of 33792 59% Number of Slice Flip Flops: 11278 out of 67584 16% Number of 4 input LUTs: 31877 out of 67584 47% Number of bonded IOBs: 93 out of 684 13% Number of BRAMs: 27 out of 144 18% Number of MULT18X18s: 122 out of 144 84% Number of GCLKs: 1 out of 16 6%

Phase 1: 141110 unrouted; REAL time: 21 mins 14 secs

Phase 2: 117379 unrouted; REAL time: 28 mins 10 secs

...

Intermediate status: 265 unrouted; REAL time: 3 days 8 hrs 16 mins

53 secs

Intermediate status: 265 unrouted; REAL time: 3 days 8 hrs 47 mins

21 secs

Intermediate status: 260 unrouted; REAL time: 3 days 9 hrs 18 mins 1 secs

Intermediate status: 259 unrouted; REAL time: 3 days 9 hrs 48 mins

37 secs

Intermediate status: 257 unrouted; REAL time: 3 days 10 hrs 19 mins

6 secs

Intermediate status: 246 unrouted; REAL time: 3 days 10 hrs 50 mins

16 secs

Intermediate status: 254 unrouted; REAL time: 3 days 11 hrs 20 mins

55 secs

Intermediate status: 242 unrouted; REAL time: 3 days 11 hrs 51 mins

34 secs

Intermediate status: 244 unrouted; REAL time: 3 days 12 hrs 22 mins

6 secs

Intermediate status: 255 unrouted; REAL time: 3 days 12 hrs 52 mins

50 secs

Intermediate status: 250 unrouted; REAL time: 3 days 13 hrs 23 mins

34 secs

Intermediate status: 248 unrouted; REAL time: 3 days 13 hrs 54 mins

39 secs

Intermediate status: 239 unrouted; REAL time: 3 days 14 hrs 25 mins

21 secs

Intermediate status: 239 unrouted; REAL time: 3 days 14 hrs 55 mins

51 secs

Intermediate status: 233 unrouted; REAL time: 3 days 15 hrs 26 mins

22 secs

Intermediate status: 238 unrouted; REAL time: 3 days 15 hrs 56 mins

50 secs

Intermediate status: 228 unrouted; REAL time: 3 days 16 hrs 27 mins

19 secs

Intermediate status: 236 unrouted; REAL time: 3 days 16 hrs 57 mins

46 secs

Intermediate status: 237 unrouted; REAL time: 3 days 17 hrs 28 mins

14 secs
Reply to
Kelvin
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--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.

401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com
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"They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759

Reply to
Ray Andraka

Here are some things to check. (a) Check you are not running out of real memory. If you are paging to disk then run times will get very large. You can check the memory usage in "TASK MANAGER" if you are running NT4, WIN2K or XP. (b) Check that you are not overconstrained or simply can never meet the timing. Check this by running "TIMING ANALYSER" at map stage.

You may consider using incremental design. Have a look on the Xilinx website for info. You may some pointers from our current TechTips

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but it is more aimed at increment synthesis.

You may also wish to consider some floorplanning to help the tools on their way.

John Adair Enterpoint Ltd.

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This message is the personal opinion of the sender and not that necessarily that of Enterpoint Ltd.. Readers should make their own evaluation of the facts. No responsibility for error or inaccuracy is accepted.

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Reply to
John Adair

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