Hey all --
So I've got yet another project making me say "Gosh it'd be nice to be able to implement a DAC/ADC directly in the FPGA." And so I looked around and found all the same white papers I always find wherein a first-order delta-sigma modulated ADC or DAC is implemented using only an FPGA and an RC filter.
I've done the DAC one before, but only in closed loop situations where the actual accuracy doesn't matter much. Has anyone actually tried doing either of these in a real quantitative sense and gotten a feel for what sorts of results can be accomplished?
Offhand, it seems like if you managed 12 bits it'd be a miracle. Even if you stabilized the power supply voltages (and had zero ground bounce induced by the rest of the logic), it seems like you'd need rise/fall symmetry into the femtoseconds on the digital outputs in order to not shoot your linearity.