Hi all,
I am in the case where I need to provide large VHDL code to a customer.
The design is very large, with some parts written specially for the customer and with some parts coming from our own re-use VHDL code.
The application is PCI based with specific data processing, with on board true random number generator modules. The PCI core side is the bigger part of the our own re-use code, and we want to protect it.
Now the question is:
How to provide the PCI core side to my customer since he cannot (wnat not to) pay for the generic VHDL source code? In an other hand, my customer want (ready to pay) to be able to simulate all design, to be able to modify the specific data processing part (not the PCI part), and to be able to do new Place&Route of all the design.
My company cannot pay for a software doing 'crypto' on the VHDL source code with a concerponding core generator.
I was thinking to provide to my customer a post-synt model corresponding to a RTL description or post-P&R model for a specific techno like SPARTAN-II (using XST). The trouble with post-synt models is we cannot re-synt. the model for a new P&R version.
So, what's the best way (low cost) to generate a RTL IP core (soft-hard core) ?
Thanks for advicing me !
Larry