Hi
I hope someone has more experience and can give advice -
what I need (for urgent customer design) is simple? design with FPGA having high speed video memory (must be implemented with standard cheap devices like DDR) - the constraints are both PCB size and power consumption. The system must support sustained 12bit DDR datastream at 165MHz pixelclock to the DVI encoder.
so current consideration is FPGA: V4 + Memory: 2 fully separate DDR chips BGA144, 32 bit physical eg 64 bit per clock edge
Q: as the DDR chips are mounted VERY close, all wires less than 0.5 inch? and there is never more than one load on the DDR chips, I am wondering is it safe to not have DDR termination resistors by using DCI in the FPGA and switching the DDR into SSTL1 mode by the extended mode register write?
Q: or perhaps there is some other memory solution known, that doesnt require more PCB space and is not much more expensive. ZBTRAMs are in BGA also and there are special video rams, but those are usually way more expensive and/or more exotic.
I guess main issues are correct PCB design and decoupling as the DDR chips power consumption is per datasheet 0.8A and the FPGA is running at relativly high frequencies as well.
any help/hints appreciated
Antti