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data read write to DDR2 SDRAM memory between microblaze and custom IP using PLB Bus

Hi everybody,

I implement an xps system by using the Bus PLB. My IP core is added to the system using Create or Import Peripheral...

I want to know how can Microblaze write several data to DDR2 SDRAM and how the IP core read all the data from this memory, modify it and write it back to DDR2 SDRAM via the PLB Bus interface.

Therefore, I would like to write the image data directly to DDR SDRAM from my custom IP core. However, I am not sure how I can get my custom core to write to the DDR using the PLB bus.

If anyone could point me in the right direction, I would really appreciate it. I know that I will need to make my custom core a "Master" on the PLB bus but I can't find a good example on how to read/write to memory.

Thanks in advance.

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Reply to
makni
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I think you're going about this the hard way. The memory interface to DDR2 for microblaze uses a multi-port memory controller (MPMC). It is easy to add another port to the MPMC for direct access to the external memory from another IP core. In the past I've found that the "native port interface" (NPI) is easy enough to use, but there are other choices in the newer versions that you might prefer.

If your IP also needs register access from the MB, then you can have it also connect to the PLB as a slave. However with the MPMC there is no need to have a PLB master to access DDR2 memory.

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Gabor
Reply to
GaborSzakacs

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