Hi
I would like to ask you guys about a cyclone II power-up problems.
I read all datasheets from altera concerning all the steps to enter finally in USER mode with the FPGA properly configured.
I have an EPCS1 memory loader, and i can program it without problems under Quartus 7.
Thing that seems to happen is the memory is not able to program the FPGA, and the FPGA itself is not able to leave POR mode.
When i watch the nstatus signal with an oscilloscope, i can see that the signal is trying to power up to VCC, with the pull up resistor i put to enter configuration mode, but once it's reach VCC, it's get to ground immediatly, wait remaining grounded, and try to power up again, and same thing happen again and again.
What do you think the problem can be ?
I checked my voltage, sometimes i have 3,1V for 3,3V, sometimes i have
1,1V for 1,2V core voltage. I rarely get 3,3V and 1,2V. This can be a problem ?Thank you for your time.