Counter ?

Yes, this is should be great, I am just going to put it in my toplevel, and simulate. Thanks a lot. (are you available for more questions?)

Hello, I received the info from another member. Just to be clear, I don't really like your question if I am professional or hobbyist, also, you do not explain how you define hobbyist/professional. Personally, I don't think it matters, some professionals are amaturish, and some amatures are professional. Don't try to put people into boxes.

Is this a day-care center or a professional newsgroup? Somebody wants to design a 4-bit counter with two additional control inputs. That is about as trivial a problem as I can imagine. If he has a problem with that, he should read some simple text books on logic design, but not post nine times in this newsgroup, and cause a 23-long thread. This is a nice, patient, and helpful group. Just don't abuse it! Peter Alfke

I also need to multiplex the clock. There will be 3 inputs instead of the previous clock. As follows:

clock1 clock2 clockselect

always @(clocksel or clock1 or clock2) begin if(clocksel) clk

All beware, confidense tricksters operate here.

Please wait.

Please wait.

To address an audience effectively, you should know your audience.

If you're an Electrical Engineering graduate, you should know electronics and logic inside out; being new to HDL involves quite a step that's easy for us to help with the transition.

If you're a software engineer getting into the hardware world, you know how to do things procedurally with precision and grace in a serial machine; being new to the parallel nature of hardware involves quite a step that's easy for us to help with the transition.

If you're a student with a difficult assignment, we've all been in your shoes; being new to the course material involves quite a step in the raw concepts involved that's easy for us to help with the transition.

If you're a lazy engineer who's paid to do this work and expected to be confident in your abilities, you're a lazy good-for-nothing indiviual trying to sap the life out of others; being lazy isn't all bad because it's easy for us to poke fun at you and try to frustrate you to the point that you actually do your work or realize that this is a forum that can benefit you in the long run if you try to learn what you can't get from textbooks by asking well-considered questions.

You have proven ineffective in trying to get information because you have not fully stated your needs. You say what you want with limited descriptions and expect us to produce an answer. Usually it takes a fortune teller (for a fee, of course) to give you that kind of detail from so little.

As for "confidence tricksters" do you mean "con men?" There are no con artists on this forum that have become obvious over the years that many of us have frequented this board. What would POSSIBLY give you the idea from the responses you have received in these two threads? As far as I can tell, your conclusion comes from visiting this forum for three days.

Go to

and take your pick That will get you 95% of the way there. One of your specs MAY need a small amount of additional logic,but I'll leave that portion as an exercise for the student.

-jg

Wot ? - That gets very close to your stated requirements, and I'm with Symon - it's a nifty little counter.

-jg

Just curious How old are you ? Is this your course major ?

-jg

At least you tried this time.

What is your target device?

miche schrieb:

Thats not an easy question, because switching to an other clock will result in hazards. So the question is: Are hazards at the resulting clock a problem or not?

If they are a problem:

1) You might disable the logic while switching to the other clock. 2) You might take care of the hazards and avoid them. If so you need two cross-coupled clock gates (one for each input clock) and the appropriate logic to select one clock AND disable the other BEFORE. If I remember it right, this is possible using 4 latches (plus combinational logic). 1 Latch as clock gate, enabled during the high level of an input clock and 1 latch to release the other clock gate. You will lose some clock pulses, if you use this solution.

Ralf