Copying/Reverse Engineering PAL

Hmm. I think that noting the connections to the CPU will provide some useful clues. Is the circuit diagram online?

I have a copy of the 3rd edition of "The Programmable Logic Handbook" by MMI. Antique technology but since it was from the dawn of PLD days it has very useful code examples. Like connecting the 68K to Zilog peripheral chips. I can scan the notes that you want.

MikeJ of FPGA arcade is resurrecting the Atari ST, so some fundamentals may match the Mac.

Cheers, K.

some

how I

method

should

a

A company in Brazil did what you suggested and it took them a few months. I did a new design from publicly available sources plus the schematic and it only took me three days and the result was faster than the original (see

for more details). My version depended on faster memories than what the 128K Mac used, but it would be equally easy to come up with a compatible timing.

useful

by

very

chips. I

That level of detail is nice, but not really needed for this job.

fundamentals may

Pretty much. My own Merlin 2 was my model, for example. The Amiga would be an entirely different story, however.

-- Jecel

Very impressive.

Might we get to see your equations? Pretty please? :-)

Interesting. Diagram not great (jpg artefacts). I'd like to redraw it.

Well, it's a nice book and I wondered if other people (esp. students) might benefit.

I guess you already said something about not keeping the resources at the time, but do you by any chance have Apple's Pal equations now? Know how I can find them or what to search for? I've been talking about this over at avrfreaks

and someone said he once had all 6 chips in his computer.

Grant

Jecel wrote:

than

Mac

timing.

some

Handbook"

has

would

I once saw a Classic Mac for £10.

I'd have bought it for reverse engineering purposes but I'm desperately trying to reduce the mass of junk I own.

Out of curiosity, can the CRT and PSU be replaced by a PC monitor and PSU?

That way I would only need the main board which I presume would be fairly small and light. I could justify keeping that much.

Knowing Apple, they probably went their own way on video...

There is a Horizontal, Vertical, and composite output. You can connect those signals pretty much directly to a multisync vga monitor and get a large screen...maybe even an LCD, but I'd put the signals through an optical isolator on my monitor... ;) One of the sync lines had to be inverted to work with old RGB/CGA monitors, but my 10 year old multi sync VGA monitor work with almost any combination of /V /H, V H, /V H, V /H, etc. The weird thing is that sometimes a new combination will cause the image to get larger.

I reverse engineered a lot of the custom chips by Namco used in early arcade games. From the circuit diagram I had a good first guess at the logic inside, and programmed that into a cpld mounted on a 28 pin dil module with the same pinout as the asic. I then ran the game as normal with my chip in parallel with the asic (all my outputs isolated from the game) and compared the two on a logic analyser. It was then fairly simple to tweak mine to match. I also manually waggled some pins to increase the test coverage. Perhaps the same trick would work ? I really don't think they will be that complex.

You can see the dev board on

/Mike

Is there a more legible copy available?

I'm trying to sketch the logic in Orcad, and having a hard time reading some characters (like RG and RQ).

Try to find an old Data IO PAL programmer. You can read out the fuse pattern from a PAL. I don't remember there being any copy protection available in PALs of that vintage.

I've got two PALs out of an AST computer in the toaster oven upstairs. ;) Maybe these things can be cracked open to easily see the fuse patterns.

I was only able to find one picture of a PAL on the internet and it looked like it was organized in a 32x64 pattern.

One interesting thing I've found so far is that the my hotwired 512k actually turned out to be a 128k. I'll post some pictures in a few minutes. Its a 128k motherboard from 1983 with 4MB and a SCSI port hotwired onto pin locations on the board. This is the early 128, not the one with the 128/512 option.

Since I have a 128k and 512k motherboard sitting right next to me I will trace some of the pins for you. Tell me every pin you can't see. Use the designation, like 9F, etc.

These pictures may help you. Please download them to your hard drive. (Instead of downloading theme verytime.) They are full resolution images from a cheap 4 mega pixel camera.

This image is the top of my 128k ONLY board modified to 4MB+SCSI. This is with the card lifted out of the sockets.

This image is the top of the 128k ONLY board modified to 4MB+SCSI. You can see the NCR SCSI chip and the SIMMs.

Here is the main difference between a 128k ONLY board and a 128k/512k board. I'll try to get some pictures of the 128k/512k board in a few minutes. You can't see the difference yet, but there will be a 128k jumper, and then a spot for the 512k with an extra 253 and some resistors. The schematic you have is for the 512k version.

Here is an interesting picture that shows the "quality" of the upgrade. ;) Look for the pal in the middle...

More later... Are you looking at this through google groups?

the schwantz wrote -

if you can get the JED file, Lattice has available on it's website - PAL2GAL.exe - this is a useful utility that converts pretty much any older PAL device file to an equivalent, pin compatilble GAL - good luck - Mike Thomas LSC FAE

Kryten,

As I mentioned in that page, after the job was done I gave Unitron all the material I had created without keeping a copy for myself (that was one of the terms of our contract). Many years later, however, I did find the very first draft of the equations (badly scribbled on) and the middle two pages of a report I wrote inside an old notebook. Since by that time Unitron had abandoned the computer industry entirely, I decided not to destroy this material.

This morning I scanned it converting each page into a (very large) PDF file. For it to be of any use to people I would have to translate the comments and report from Portuguese to English, but if you want it anyway:

(8.4MB) first page of equations (7.4MB) second page of equations (300KB) page 2 (of ?) of project report (1.7MB) page 3 (of ?) of project report

This was the very first draft I mentioned in my story (which impressed Alberto Diez (not Dias like I spelled on that page) when he thought it took me a week to do) and the second draft, probably incorporating most of the hand written notes in the above file, was broken enough that even the power supply wouldn't start up. It was the third draft that after a small patch made the machine work and I don't have that available.

Note that I had to come up with my own names for many of the pins and they won't match the schematics you can see online.

Is the schematic of the unitron close enough to the mac 512k that we can use Apple's schematic?

At least most of it is typed Portuguese, I can fumble my way through google on that. ;)

The part where you talk about turbo, does that section have anything to do with the 23% speed improvement mentioned on the unitron page?

Except for different pin names, it should be exactly the same. For example:

Apple names my names

16M SYSCLK 8M PCLK M/VID S1 /RAM /RAMEN /ROM /ROMEN /AS /AS /UDS /UDS /LDS /LDS /CAS0 /CASL /CAS1 /CASH /RAS /RAS TC VCLK 1M Q2 4M Q1 2M S0 /DTACK /DTACK

Here is a quick translation, probably better than what Google or Babelfish could do:

to

Exactly, though I only compare with the original and not SE/Classic timing.

Ah, I see.

I've just finished a first draft of re-drawing the Mac circuit in Orcad.

It is just to get an idea of how it works.

The ROM/RAM/CPU sections are not hard to fathom.

There are a load of multiplexers for CPU/VDU/audio access, not so simple but you can see what it is up to.

Most complexity lies in the PALs/IWM, but you can tell which PAL pins are definitely not outputs (those on the left of the chips.

Incidentally, even if we do manage to recreate the PAL equations, how will we recreate the IWM?

If it is only relevant to disk access, we can live without it because floppies are no longer an essential medium. People backup to CD/DVD, and use memory cards instead of floppies.

I've managed to get an idea of what things are going on.

Perhaps I could make a web page of my own scribblings?

I don't know if I can be bothered to recreate the Mac, because the Atari ST is better (colour output, TV display, games). But maybe someone else is and would find my notes helpful.

That would be nice, but another poster seems to have translated some of it already.

I will try to collect a few notes for the web site.

Thanks for doing the scans. History and I thank you!

I'd like to see those schematics, if you wouldn't mind. Something that Eagle can open?

If you would like, you can post your work on a web board I'm working on. I have a ton of information and a few interested people. I also see the need to move away from the fpga list once the on topic pal discussion ends. ;)

I bought an 18 channel logic analyzer that is capable of over

128k-1.5M samples depending on the activity. By this weekend I will have a few dozen captures of the PAL input/output in a form that can be downloaded. The software that comes with the logic analyzer is free, so you can view/manipulate the data pretty good. I also bought a few Mac 512k motherboards off ebay for $9 to get extra PAL chips from. On Tuesday I will be decapsulating/delidding/decapping the chips and photographing them with my digital camera. I hope that the PALs look the same on the silicon layer as they do on the datasheet. ;) I expect to have pictures of at least one PAL this weekend. 32x64 at the right magnification should only take up a few pictures.

For me, every part of this project is an adventure. I will be attempting to decap the ICs by covering their bellies with heat sink compound, heating them on a hot plate to 130*C, and then dripping nitric acid on to them. :)

I've also made a few processor replacement PCBs that allow a new

68HC000 PLCC68 to replace the 68000 DIP64. They had to be custom carriers, because of the pinout change and count. So I put 64 pins on the carrier and a signal name next to each pin. I also threw in a mac logo in the traces on the top layer. ;) I have an extra carrier if anyone is interested... Another benefit of the new 68HC is its a 16MHz model. ;)

Sounds like a fun project. Better to halfway through something and stuff it in the corner than watch prime time TV. ;)

Grant

The issue with the IWM is confusing. I'm not sure how the Plus roms would handle not having the IWM or 5380 SCSI chip.

I can not find any 5380 chips on the market. Zilog has a Z53C80 that is in Life-Time production, but they have no stock and neither do any of their distributors. The 5380 could probably be duplicated with 2 or

3 75MHz PICs. Sorry, but I have no idea what a FPGA is except what the letters stand for. Maybe we could make a 5380 in an FPGA, but then it wouldn't be through hole .1" spaced... Can we get a DIP / PLCC fpga with enough hourse power to do the 3MHz SCSI link?

With the SCSI chip it would be pretty easy to fake a SCSI drive with a microcontroller and attach some flash.

Another solution would be emulating the IWM and using the HD20 method of putting 20MB on the disk drive port. The only problem with that is the 400-500kbit transfer rate on those ports. :(

There was the suggestion of putting the whole plus into a single FPGA. That sounds neat, but the theory is out of my grasp at the moment. After I get a better understanding of the computer and possibly some experience with FPGAs from the project...

I suspect Eagle cannot read Orcad files.

I could print to pdf if I find out how to re-install distiller on my PC.

Meanwhile I might be able to send you screen grabs. Where should I email them?

I started doing so here:

It has links to some PAL application notes about interfacing the 68K, I think they will be very informative.

I am squeezing the multi-MB pdf files into 4-bit greyscale PNG files unitron2 is done, am downloading unitron1 right now.

Nice.

I'm buying an ST motherboard soon, as a reference.

My local professional supplier (RS) still sell the PLCC68 68HC000 but in tubes of 18. Maybe it isn't obsolete as I thought? Works out about £11 each for the 16 MHz, or £6 for the 8 MHz chips.

Perhaps you could borrow one of those USB camera microscopes for the job.

At some point you will have to recreate the logic equations, and will have to figure out how the 68K works. I'd read the app notes first and you may be able to make a good start.

I would want to at least put the six PAL into one CPLD. Maybe the IWM can fit in a modern CPLD too.

CUPL is a bit primitive, I'll have a go converting the app notes to VHDL, and compile them using Xilinx ISE.

Cheers, K.