Hello Guys,
I am facing this chellenge for a long time now. I have TTL compatible clock (20MHz) with rise/fall time around 40 ns. It goes to my CPLD, which outputs 3 clks of 10MHz, 5MHz and 2MHz. And the CPLD (MAX3032) will also give around 40 ns rise/fall time I guess. I need rise/fall times of < 2ns for my application. I have tried different things including trying to buffer the clock but still doesnt work. I am sure many people have come across this problem. Anybody has a solution(s)!
Thanks, Drew