Hi, Does anyone know how I can convert my verilog code to VHDL?
Stanley
Hi, Does anyone know how I can convert my verilog code to VHDL?
Stanley
I would ask in comp.lang.verilog or comp.lang.vhdl
-- glen
Do not forget to mention level of description (RTL or structural). The latter should be simpler.
:Hi, :Does anyone know how I can convert my verilog code to VHDL? : :Stanley :
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