Convert verilog to VHDL??

Hi, Does anyone know how I can convert my verilog code to VHDL?

Stanley

Reply to
<sc01
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I would ask in comp.lang.verilog or comp.lang.vhdl

-- glen

Reply to
Glen Herrmannsfeldt

Do not forget to mention level of description (RTL or structural). The latter should be simpler.

Reply to
Valentin Tihomirov

:Hi, :Does anyone know how I can convert my verilog code to VHDL? : :Stanley :

Reply to
David R Brooks

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