Constraining timing analyser when using two DCMs

Tool = ISE 8.2i Target = Spartan 3 xc3s400-4tq144

I'm using an external 50 MHz oscillator and a single DCM to generate clocks of 50, 100 and 200 MHz. I would like to change this to 50, 90 and 180 MHz from the same external oscillator. I tried this using two DCMs and the timing analysis report went crazy! I think this is because the clock edges from a single DCM are all synchronised, but now I have routing delays which cannot be cancelled by the DLL. How do I stop the tools from checking paths between different clock domains?

Reply to
Andrew Holme
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Google UCF TIG HTH, Syms.

Reply to
Symon

I tried putting this in my UCF:

NET clk_50 TNM_NET = clk_grp1; NET clk_90 TNM_NET = clk_grp2; NET clk_180 TNM_NET = clk_grp3; TIMESPEC tig1 = FROM clk_grp1 TO clk_grp2 TIG; TIMESPEC tig2 = FROM clk_grp1 TO clk_grp3 TIG; TIMESPEC tig3 = FROM clk_grp2 TO clk_grp1 TIG; TIMESPEC tig4 = FROM clk_grp2 TO clk_grp3 TIG; TIMESPEC tig5 = FROM clk_grp3 TO clk_grp1 TIG; TIMESPEC tig6 = FROM clk_grp3 TO clk_grp2 TIG;

But I get errors: ERROR:NgdBuild:765 - Line 46 in 'foo.ucf': A parsing error has occurred while reading the constraint file. The value 'tig' at column 10 is invalid.

Reply to
Andrew Holme

This seems to work:

TIMESPEC TS_tig1 = FROM clk_grp1 TO clk_grp2 TIG; TIMESPEC TS_tig2 = FROM clk_grp1 TO clk_grp3 TIG; TIMESPEC TS_tig3 = FROM clk_grp2 TO clk_grp1 TIG; TIMESPEC TS_tig4 = FROM clk_grp2 TO clk_grp3 TIG; TIMESPEC TS_tig5 = FROM clk_grp3 TO clk_grp1 TIG; TIMESPEC TS_tig6 = FROM clk_grp3 TO clk_grp2 TIG;

It seems to need the TS.

Reply to
Andrew Holme

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