I just had a design review on my board and I was zinged for using resistors to pull the M[2:0] pins to power or ground. I have always done it that way and do not see a reason to change. But the Xilinx documents were shown to me, specifically XAPP453, where they clearly show the pins being pulled hard to power or ground.
I can't find any info in the data sheet on the threshold levels on these pins (or JTAG), so I can't dispute the argument that I should follow the app note.
The same person is saying that an XAPP (which I can't find) indicates that the various JTAG signals need to be pulled low by resistors rather than high. I have always used resistors to pull TCK and TMS high to assure that the JTAG port was not put in an invalid state. The TDI and TDO signals were not important. I am aware that these pins are 2.5 volts. Is that why they are shown pulled to ground, to avoid any confusion about *which* high? Any official source of info on this?
I have looked on the Xilinx web site, but there are dozens of documents that score a hit on JTAG and Spartan and I don't see any that answer the questions.