Complex Baseband

Howdy, For FM/AM demod, you require a complex baseband. I am downconverting the IF from 1MHz to baseband by multiplying the input stream (12 bits) from the ADC with Sin and Cosine outputs of a DDS and therefore, generating I, Q I am using standard 18x18 signed multipliers in Xilinx to do the mixing. Is this right or should I use a complex multiplier? The reason why I am asking this question is because, I had implemented the whole datapath (Downconversion, Rate decimation, Compensating FIR) and verified it on the bench and then implemented CORDIC for getting FM, which never worked. So instead I tried to do AM demod by not using CORDIC but (Sq(I) + Sq(Q)) using standard 18x18 signed multipliers and still no AM demod which is supposed to be simple. Then I took the CIC and CFIR filters out and tried to do demod straight after the mixing, still nothing. So I'm kinda stuck here, any help will be appreciated Thanks

-M p.s. I don't have access to Matlab and System generator, but I'm buying them next week. I figured, doing digital radio design without modeling tools is like digging your own grave!!!

Reply to
morpheus
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Multipling a real times a complex only needs two real multiplies, so you do not need a complex multiplier. What you do need to keep an eye on is where you centered your complex signal, and does this match what the downstream processing is expecting. Did you shift your signal to be at DC to fs/2, or from -fs/4 to fs/f? Did you filter and decimate after mixing, or leave it oversampled? There are multiple ways to do this, and if the different parts do not agree, you get garbage out.

Here is a starting point for some further explanation:

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Regards,

John McCaskill

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Reply to
John McCaskill

Hey John, I have centered the signal between DC and fs/2. My problem is that even though the I and Q channels are getting mixed correctly (verified by offsetting the carrier frequency and watching the modulation move by the offset value around DC on a spectrum analyzer), the demod is not working, sq(I) + sq(Q) seems like a dead output....i checked the synthesis report and post P&R simulation and it seems to be working in simulation. Bizarro!!!

-M

Reply to
morpheus

When I say its "working" in simulation, I mean that through LabView I generated a FM modulated signal sampled at 50MSPS (same as my system) and used that as the input test vector to my design. I am doing functional verification using ModelSim and I can see that I*I + Q*Q outputs being computed, but they don't seem to be present in hardware. I am thinking there is something weird going on system wise that is leading to this anomaly, maybo some harmonics that are leading to cancellations or something, because I just cannot understand why the I*I multipliers are not working

Reply to
morpheus

Chipscope?

Reply to
Symon

But you have access to Octave and Scilab. Both free and powerful.

Kojla Sulimma

Reply to
comp.arch.fpga

Well, honestly I didnt know about these tools, I don't have chipscope either. I did get an A/D board from LT which has a daughter board for data collection. This is a cool boar, it attaches to the A/D board and has a FPGA on it (with a big-ass heat sink on the FPGA). Anyways, they have software to log the A/D data and compute other parameters like SINAD/ SNR, etc. I am planning to use this board to collect data and use that as input to my simulation cheers

Reply to
morpheus

Dear Morpheus,

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Click on 'evaluate'. HTH, Syms. p.s. I've got one of those LT boards too. V.cool.

Reply to
Symon

If your IF is complex, then you'll need a complex multiplier to multiply your complex IF by the complex LO (cos + j*sin). If, on the other hand, your IF is real-only (which I suspect it is), then you multiply the real IF by the complex LO. That uses a pair of real-only multipliers (note, this is the same as using a complex multiplier and tying the Q part of the IF input to 0).

Is your LO tuned properly to get a signal to baseband?

And yes, you should have Matlab or another similar tool to let you work on the algorithmic implementation before you start the actual design, as well as to model the design for verification purposes. You don't need System Generator to turn out DSP designs for FPGAs, in fact I find it gets in the way more often than not for the high speed stuff I am usually involved with.

Reply to
Ray Andraka

Ray, Your suggestion makes sense. I had implemented real only multiplier as my IF is real. Regarding the output of the envelope detector, I think, due to truncation at various stages, I have had to drive the ADC, DAC really high to get some sort of an output. I need to rethink my truncation strategy at each stage as I am losing tons of dynamic range and this would be helped if I have a system modeling tool. Bless the good people at MathWorks. Thanks for all the comments

-M

Reply to
morpheus

You might consider one of the Matlab clones: Octave or I think the other is called Scilab. I don't have experience with either, but from what I understand both will run matlab M files and have pretty good coverage of the matlab function set.

Reply to
Ray Andraka

Scilab is similar to Matlab but not compatible, Octave is said to have very good compatibility to Matlab. Scilab has a good Windows installer, Octave is better used under Linux.

Kolja

Reply to
comp.arch.fpga

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