College Project

I am an electrical engineering student who has been tasked to create short game using WinCUPL. We are expected to set up a sequence o states to run the game

While the program compiles in WinCUPL and has been debugged it someho

has outputs which barely match the states at all. I do not understan how there could be an output when the state does not indicate tha there should be one. I suspect that I am missing some detail in th programming

It seems that the teachers are as clueless as I am as to the nature o

the problem. While I have working code from another student I canno understand the difference between his and mine. I would really lik to know how WinCUPL works

Could I get a good WinCUPL tutorial or instruction site, or some hel

with debugging the code? I can post the lab and my code. Otherwis I can be reached by AIM, screenname Pocket Door

Thanks a lot

Reply to
Pocket Door
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One really big "detail" is that it ain't a program -- it's a hardware description. Programs are things written in computer languages to be reduced to machine code and executed _in sequence_ by a _processor_. Hardware descriptions are written in hardware description languages to be reduced to configurations of _logic_ on FPGAs or PGAs where they _exist_, and possibly contain registers that are clocked. If you want anything to "execute" in "sequence" you've got to invent that part.

How are you (or your hardware synthesizer) representing the states? Are you using 1-hot encoding or some other method that can have illegal states if the registers aren't initialized properly? Are you initializing your registers?

If they told you it's programming perhaps. If they told you it's hardware descriptions and you missed that "detail" then perhaps you have a listening problem.

Usenet is a public service, not a place to solicit private tutoring. Post you code, by all means. I know next to squat about WinCUPL, but someone may help you out.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
Reply to
Tim Wescott

Maybe me thinks you should get another career.

Sorry to be less than helpful.

If you give your real name I am sure it can be forwarded to your adviser or just use google as usual.

Others here will likely give you their hourly rates for assignment help!

JJ

Reply to
JJ

That statement is contradictory. If it has been debugged, then it works. If it fails, then you have not yet finished debugging... Did you just mean it compiles without errors ? - that only means it is syntax checked - not debugged.

Does your testing procedure include Hardware Vector testing on a device programmer ? Or is this the simulation vector output, from CUPL ?

The most solid design path, if you can apply it, is to both SW simulate, and ALSO run test vectors on a device programmer. When ALL pass, you can be confident all test-covered functions are OK. And also well set up for both future revisions, and production programing.

There is good potential here for learning. If you have one example that works, and your own, then compare the source files, and the CUPL .DOC files, and also the .SI and .SO files,

It's a matter of 'spot the difference', and then trying changes, until either his breaks, or yours works, depending on which direction you decide to approach from.

The CUPL output .DOC file shows what CUPL has built, and so shows 'how cupl works' - if you also go tru a fitter, look at that .FIT report file as well.

Example files are some of the best tutorials, and your teachers should have many working examples.

-jg

Reply to
Jim Granville

As I understand we are using the program WinCUPL to produce .JED file for GAL22V10 microcontrollers. I appologize for any misuse terminology and see that it's not really debugged at all

This is the working code I have been given. As I understand i

defines states and has a clear sequence where one state moves t another depending on the three inputs. Now, several of the state are redundant to create the time lag that is supposed to occur befor the 'go' light appears

Name Lab9C

Device G22V10 Format j

/*Input Definitions *

pin 1 = clock pin 2 = a pin 3 = b pin 4 = r

/* Output definitions *

pin 19 = go pin 20 = wina pin 21 = winb pin [15..18] = [Q3..Q0]

Field Lab_9_Game_Design = [Q3..Q0]

$define S0 'b'000

$define S1 'b'000 $define S2 'b'001 $define S3 'b'001 $define S4 'b'010 $define S5 'b'010 $define S6 'b'011 $define S7 'b'011 $define S8 'b'100 $define S9 'b'100 $define SA 'b'101

/* Logic equations *

sequence Lab_9_Game_Design

PRESENT S

IF !a & !b & ! NEXT S0 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S1 IF a & !b & ! NEXT S1

PRESENT S

IF !a & !b & ! NEXT S2 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S2 IF a & !b & ! NEXT S2

PRESENT S

IF !a & !b & ! NEXT S3 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S9 IF a & !b & ! NEXT SA

PRESENT S

IF !a & !b & ! NEXT S4 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S9 IF a & !b & ! NEXT SA

PRESENT S

IF !a & !b & ! NEXT S5 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S9 IF a & !b & ! NEXT SA PRESENT S IF !a & !b & ! NEXT S6 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S9 IF a & !b & ! NEXT SA

PRESENT S

IF !a & !b & ! NEXT S7 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S9 IF a & !b & ! NEXT SA

PRESENT S

IF !a & !b & ! NEXT S8 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S9 IF a & !b & ! NEXT SA

PRESENT S

OUT go IF !a & !b & ! NEXT S8 IF !a & !b & NEXT S1 IF !a & b & ! NEXT SA IF a & !b & ! NEXT S9

PRESENT S

OUT wina IF !a & !b & ! NEXT S9 IF !a & !b & NEXT S1 IF !a & b & ! NEXT S9 IF !a & b & NEXT S1 IF a & !b & ! NEXT S9 IF a & !b & NEXT S1 IF a & b & ! NEXT S9 IF a & b & NEXT S1

PRESENT S

OUT winb IF !a & !b & ! NEXT SA IF !a & !b & NEXT S1 IF !a & b & ! NEXT SA IF !a & b & NEXT S1 IF a & !b & ! NEXT SA IF a & !b & NEXT S1 IF a & b & ! NEXT SA IF a & b & NEXT S1

For my version (which does not work) of the lab I used only fou

states, trying to use less states to simplify my program. I als attempted to use a FIELD to define the inputs sets (again, appologize if I'm not using the correct terms, we were taught this b the instructor very informally). When I program a chip with this an wire it up the GO light and the WinA light are both on almos constantly. Since no state of my program has two OUTs at the sam time I am very confused

Name Lab9A

Device G22V10 Format j

/* This is Lab 9 *

/* Inputs *

Pin 1 = Clock

Pin 2 = InA Pin 3 = InB Pin 4 = Reset

/* Outputs *

Pin 15 = WinA

Pin 14 = WinB Pin 16 = GoL

Pin [17..19] = [Q3..Q1]

/* State Assignment *

FIELD Game = [Q3..Q1]

$Define Start 'b'00

$Define Wait 'b'00 $Define GoTime 'b'01 $Define AWins 'b'01 $Define BWins 'b'10

FIELD mode = [Reset,InB,InA]

Zippo = mode:[0,3] ItsA = mode:1 ItsB = mode:2 StartIt = mode:[4..7];

/* Logic *

Sequenced Game

Present Star

IF Zippo NEXT Start

IF ItsA NEXT Start IF ItsB NEXT Start IF StartIt NEXT Wait OUT !WinA, !WinB, !GoL

Present Wai

IF Zippo NEXT GoTime

IF ItsA NEXT BWins IF ItsB NEXT AWins IF StartIt NEXT GoTime OUT !WinA, !WinB, !GoL

Present GoTim

IF Zippo NEXT GoTime

IF ItsA NEXT AWins IF ItsB NEXT BWins IF StartIt NEXT GoTime OUT !WinA, !WinB, GoL

Present AWin

IF Zippo NEXT AWins

IF ItsA NEXT AWins IF ItsB NEXT AWins IF StartIt NEXT Wait OUT WinA, !WinB, !GoL

Present BWin

IF Zippo NEXT BWins

IF ItsA NEXT BWins IF ItsB NEXT BWins IF StartIt NEXT Wait OUT !WinA, WinB, !GoL

I have attempted to rewrite my code a variety of ways and always the same faulty output occurs. If we throw switches (connected to InA and InB) we can get the WinA and WinB outputs to blink sometimes in a way they are generally supposed to. However, why are they blinking? If the Reset switch is not thrown the code should not loop at all.

I suspect that I have used bad or sloopy sintax somewhere in my program (this would be considered a program, correct?) and as a result my chip does not know how it should act.

If my description of the lab output is inadaquate I can go and run my program again and take better notes. I'm hoping that my error would be obvious to a more skilled programmer.

Where does my program fail where the working code succeeds?

Thanks again for the help.

Reply to
Pocket Door

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