Hello, did anyone know how to realize a CMI Coder/Decoder in a FPGA (preferred in VHDL). Thanks for answers an tipps. Volker
- posted
17 years ago
Hello, did anyone know how to realize a CMI Coder/Decoder in a FPGA (preferred in VHDL). Thanks for answers an tipps. Volker
CMI coder is super-easy. Understand the format and you should be able to code it in very few lines.
CMI decoder requires a recovered clock that is not integral to the FPGA except, perhaps, for some SERDES blocks. At 140-155 Mb/s, perhaps not.
Because of the need for the recovered clock as part of the system design and the extremely simple coding method, I doubt you'll find pre-bundled code out there.
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