Hi All,
I have problem with clock signal in FGPA XC95288XL144. I have 3,3V signal on the output but I want get 5V signal. I say in addition that I use chip with
3.3V power supply. Should I use pull up or different operation? What do you do with clock signal in FPGA?Thank you
Hi, If you _really_ need 5V, then buffer it.
The Xilinx XC9500XL _CPLD_ chips will handle 5 volts on the inputs, but as you noticed, it can only output a 3.3 volt signal. If you need to connect the chip to a CMOS chip that has TTL levels (i.e. 74HCT), then you can directly connect them. However, If you need to connect to a 5-volt CMOS chip (i.e. 74HC), then you need to use a bus switch or a voltage-level translator chip. These chips will usually have both a 5-volt and a 3.3-volt power pin. You can get around this problem by using the XC9500 (not XL) CPLD chips, that run on 5-volts and ouput 5-volt signals. They are more expensive than the XC9500XL chips, especially for the larger chips (i.e. 288 Macro Cells).
-Dave Pollum
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