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- Posted on
September 4, 2003, 8:43 am
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Re: Clock Recovery from 8B10B encoded Data Stream
The DLL can not be used to extract clock, as the output is just the
In Spartan 3 there are "hidden" modes in the DCM that allow us to
experiment with things like CDR, so you will have to wait until we have
fully characterized the capabilities, and decided if they work well
enough to market and support.
The exciting thing about the DCM and all of its capabilities is that we
can see our way to an all digital DSP implementation of a PLL -- without
any of the negatives of a PLL. Including jitter attenuation (something
not done in today's DCM).
If you are interested in using the S3 unsupported modes, you would have
to work through your factory or disti FAE with us.
Another option is to oversample the 100Mbs with the MGTs in Virtex II
And finally, there are other designs using logic alone to recover the
datastream of such a low bit rate stream in any of the Virtex family
FPGAs (Xapp250, Xapp224).
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