Clock buffers on the Viretx E

The xilinx tool is forcing the external clock input to the internal clock buffer. And this buffer can take input from only selected channels. This restricts the input clocks to some clock pins. How can reassign it with the tool.

  1. is there any problem in doing this
  2. How can i achive this. i want to route a low frequency clock through normal i/o pad.
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vssumesh
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