Cleaning generated files in Xilinx 8.2 EDK and ISE

Hi All,

Does anyone know when I should "Clean all generated files" in Xilinx

8.2i EDK? Should it be done before or after doing import of your user peripheral after you have made some changes to it? The analogous procedure should of course always be done in ISE before rebuilding your project with changes. For example, in the installed html help files, it says: "The Clean All Generated Files command removes the generated files from a specific task. For example, the Platform Generation tool (Platgen), which is invoked using the Generate Netlist command, generates the netlist files from the source VHDL code. When you clean the process, the generated netlists are removed." (file:///C:/EDK/doc/usenglish/help/platform_studio/platform_studio.htm#html/ps_c_gst_whatsnew.htm) Can anyone tell me where I can find documentation on what I need to clean and how I go about selecting a process so I can clean its files? It would be nice if I don't have to spend hours redoing BSB every time I want to make sure I have a fresh and true build of what I think I'm building.

Thanks in advance,

-James

Reply to
Jhlw
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There are only two situations where I have cleaned the generated files. One is when I wanted to make a compressed (zip) copy of the directory, either for backup or to send to Xilinx in support of a webcase. The other is if I want to force EDK to resynthesize the design (via Export to Projnav). Otherwise I never bother and have seen no ill effects.

I wouldn't say "[t]he analogous procedure should of course always be done in ISE before rebuilding your project with changes". ISE has always recognized when there are source code changes and will rebuild accordingly. Plus, there is a right-click method to force any processing flow step. Cleaning is useful if you want to reduce the size of a backup.

--
Joe Samson
Pixel Velocity
Reply to
Joseph Samson

See whole thread at:

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I have been getting exactly the same output continually from my project when I load it into my development board (ML403), in spite of making changes that should cause different output. When I did "Project -> Clean All Generated Files" in EDK, I finally managed to get some changes to appear.

I think the solution is to make a zipfile of the fresh project containing the autogenerated user IP and restore that to a fresh directory every time you want to make a change to the user IP, rather than guessing what files need to be cleaned (see my first post in this thread for a quote from a help page that says you can clean the files of a "process" but doesn't say anything else -- that was the entire content of that help page).

I'm following the EDK_82_PPC_Tutorial.pdf for the ML403 board; see

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-- "EDK PowerPC Tutorial using the ML403 Development Kit 8.2" and adding my core to the user IP. This worked for me in a previous project, and I don't think it is any accident that it suddenly started working the day I tried it in a fresh project.

It does seem to be my experience as a user with a couple of months of experience that project files need to be cleaned in ISE, too, so users with similar levels of experience and knowledge of what needs to be cleared are probably safer in starting with a fresh project every time they make a change, by making a zipfile of the fresh project when they set it up. However, creating a fresh project in ISE is almost trivial compared with going through BSB ("Base System Builder") in EDK followed by "Create User Peripheral". What could save some time in ISE is if you had to set up a complex test bench waveform. After you have changed that a few times and have rescaled the timing and changed its length, it gets "tired" and produces a bit of a mess the next time the timing is rescaled. It's a good idea to make a zipfile copy of the whole project so you can just restore it, unless you know more than I do and know exactly what files to save in order to save the testbench.

I'm taking the time to write this in hopes that it will help others in a similar situation.

The effect of this Xilinx toolset is to magnify the "haste makes waste" principle (trying to hurry makes it easy to make mistakes, which waste time) by creating a situation in which a user's natural impatience in not wanting to take the time to continually build a new project results in wasting massive amounts of his time*; I might have probably been able to get my new project working about two weeks ago, after one week of working on it, or at least I could have been investigating some real issues, instead of continually rebuilding a mess of left-over old builds and not getting what I think I'm getting. I knew about "Cleaning Project Files" in ISE to do the Build, but I wasn't clear about always starting with a fresh EDK project, which is the project I'm building. I don't seem to be getting the help I need from my various technical support personnel, because they do not ask me questions to find out my status and therefore they don't find out the mistakes that I'm making. This is probably because some people get angry at them for insulting their intelligence -- aside from them just not having the time or the inclination to help. The solution to the former dilemma might be for tech support personnel to ask questions at an advanced level and ask progressively more basic questions until the status of the user is found; the step size at which questions can be made more basic can be changed adaptively according to the user's responses.

*This may be due to ignorance of design principles or a desire to make money by selling training courses. What do people think the appropriate way to deal with those two cases might be? This reminds me of yesterday's "Dilbert" --
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-- in which "Ninety percent of your customers ... 'Fantasize about beating you to death with your stupid product.'"

Cordially,

-James

Reply to
Jhlw

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I have not used EDK 8.2 yet, but version 7.1 did not recognize changes to your custom cores automatically. Apparently that has not changed. There is a flag you can set to cause the cores to be rebuilt automatically every time.

The very strange thing, is that EDK creates conventional make files, so it would be easy for it to detect changes in source files and rebuild when changes are detected. And in my case, that is what I have done. I take the EDK generated make files, edit them to add the appropriate lines to recognize changes in the source files, and then build projects from the command line with "make".

Unlike EDK, ISE has always correctly detected changes for me. I don't "clean" the files there, and use the GUI to rebuild. It now seems good enough for everyday use.

Reply to
Duane Clark

OK; I think you have more experience on this than I do.

I sent the following to the Xilinx customer service manager:

Since you are a customer service manager, I wonder if you can help with the suggestion that I have below? There was a simple point that would have only taken a minute to explain to me, and would have saved me days and possibly up to a week or two. Today on my way in to my office, I helped a 50-60-something lady in the parking lot hold something that would have caused her a lot of inconvenience if it had blown away in the wind. Similarly, if somebody could have helped me as I suggest below, it would have saved me days, etc., of my time. Wouldn't it be nice if I could feel it a pleasure to help someone else rather than to have to grit my teeth and think, over and over, "If I help someone, what goes around will come around... If I help someone, what goes around will come around..." ??

Here is my message that I just sent (this CAE is a pretty good guy, in contrast with another guy from California, who was very selfish and uncaring (in a previous webcase, "FPGA tools do unexpected things" -- he ended up with a random guess designed to get rid of me and told me that he couldn't give me any more support because he had to close the web case "for statistics" (i.e., so he could look good))):

Date: Nov 5, 2006 5:24 PM (-0500) Subject: Re: FW: WebCase "ACTUAL results DISAGREE with SIMULATOR results." Re: 8.2i XST - support of VHDL function

Hi ,

My whole difficulty for which I needed this webcase was resolved by realizing that I had to do "Clean All Generated Files" in EDK, not only "Cleanup Project Files" in ISE (and according to the people on Usenet, doing it in ISE is not even necessary). This was why my results were not agreeing with simulation, because I wasn't building what I thought I was building.

Today I realized what my bug was, in only a short time. It only took me a short time to debug my code, but it took me many days because I didn't know about "Clean All Generated Files" in EDK, and I wasn't getting results I could use to debug. This was very confusing, because it is in ISE in which it seems that all the generated files are being created, so I think that's what I have to clean, not EDK, because it just seems like it only creates "source" files. So I have two recommendations:

  1. please put in a change request for the documentation and for EDK. Ideally EDK should just automatically delete its generated files when the user makes a change that requires them to be deleted. Where the documentation says: "The Clean All Generated Files command removes the generated files from a specific task. For example, the Platform Generation tool (Platgen), which is invoked using the Generate Netlist command, generates the netlist files from the source VHDL code. When you clean the process, the generated netlists are removed." (file:///C:/EDK/doc/usenglish/help/platform_studio/platform_studio.htm#html/ps_c_gst_whatsnew.htm) That is horrible rubbish, since that is the ENTIRE contents of that help page. Instead, it should say "You must do "Project ->

Clean All Generated Files" after making changes to System Assembly, or your changes WILL NOT be recognized." But that is still not very good. A user should not have to search an obscure manual to find out about such an important step that will really hurt him like this if he doesn't know about it. The EDK should at least TELL the user with a message box that "Now Generated Files Should Be Cleaned" if it cannot do it automatically. Also, that help information should not just talk about "cleaning a process" with NO information about how you specify a process or DO the things it is talking about -- that is horrible user abuse. It is horrible abuse of the user to put in such an obscure bit of help "information" when a clear statement: "You must do "Project ->

Clean All Generated Files" after making changes to System Assembly, or your changes WILL NOT be recognized." is what is needed. Please put in the simple, needed help information, first, and THEN, when you as a company have time, add the technobabble when you have time to add the complete explanation. Even so, with something like this, it is still horrible abuse of the user to have this only in the documentation; it should show as a message when EDK is used. Ideally the objective is that a user should not have to read a manual, because no one likes studying obscure and confusing fine print when they have a job that they have to be doing. I hope I am making myself very clear on this point.

Reply to
Jhlw

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