Choosing FPGAs: Xilinx vs Altera vs Actel vs Lattice

Whether a part is a generation behind or how many transistors are in the config memory is not really relvant to the board designer, now is it? You should care about speed, size, price, availability and support. Sure one transistor should be smaller than 6, but if it is not reflected in the price, then why would you care? Focus on the requirements you care about, not how the chip maker meets your requirements.

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Rick "rickman" Collins

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A million "ASIC" gates or "FPGA" gates? The gate count in FPGA mfg specs are notoriously overblown when compared to an ASIC design. You should try to quantify your design size in terms of flip flops, 4-input lookup tables and ram. The granularity of a 2 input nand gate is meaningless in the FPGA world, which is how the mfg's get away with such wildly optimistic numbers.

Jeff

Hi,

Gupta wrote

Flash has the advantage of storing your design even after power down. SRAM needs to load the bitstream after power up, so you usually need an additional EPROM on Boardlevel. I wouldn't bother about the transistor quantity. The questions are:

- Speed

- IO number

- IO levels

- Package (-size)

- Area (usability of cells, e.g. Xillinx wouldn't allow you to use

100% of the cells)

- Embedded RAM

- volatile

- reconfigurable

- power supply (low power, different levels,...)

- Software (prize)

- Cost for additional HW (Download cable, programmer for fusebased Fpgas,..)

First define and weight your needs, than choose the best applicable device.

bye Thomas

Thanks Rick. You are right that if the size of the transistor does not reflect, I shouldn't care on the cost metric. But what about the performance metric ? Does smaller size of the configuration memory improve the performance, because the size of the FPGA will be smaller for the same number of gates (assuming that its in the same process technology).

This is utter nonsense. There is nothing wrong with using 100% of the logic resources, if the routing structure supports this. And that depends on the design style. Newer families have considerably more routing than the old ones. Whether a design is logic- or routing-limited has nothing to do with the particular manufacturer.

I am not really paranoid, but our dear competitor has recently cranked up the marketing spin machine, believing that mudslinging might be productive. It is not, not even in politics. When you listen to a new product presentation where 40% of the material talks about the "bad" competitor, draw your own conclusions. Are they afraid ? Let's be positive. We all have good products to promote. Spreading lies about the competition is counter-productive.

Peter Alfke

Thanks for your reply Thomas. I guess I should ask the question in a different way: for devices from different vendors with the same number of gates, will I get better performance and/or cost from a Flash or a SRAM based FPGA ? Also, I assume that the comment about usability of Xilinx cells being low is related to routability ? Is it any better with the Altera/Actel etc parts ?

Thanks Sumit

Here is a slightly biased comment: The reason that we do not offer Flash-based FPGA has to do with price and performance. If Flash is included, the process is inevitably more old-fashioned and more complex, which means lower performance and higher cost per function. In our mind, that outweighs any advantage of on-chip Flash for the majority of applications. Obviously, there is always a niche where priorities are different... Peter Alfke

Again, if performance is what you care about, then look at the performance numbers. The problem with looking at the configuration cell size (or any other single feature of an FPGA) to gauge various performance characteristics (price, speed, etc) is that they are controlled by many other aspects of an FPGA. If all other aspects were the same, then that one feature could be a good indicator, but the other aspects also change a great deal.

So if you care about speed, then look at the speed!

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Rick "rickman" Collins

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Whoa!!! Calm down there. Are you saying that Thomas Stanka is an Altera vendor? I think he is just another user and you have mistaken his non-native english for a criticism of Xilinx. I don't think he meant "Xillinx [sic] wouldn't allow" for "Xilinx does not guarantee". We all understand that you might be able to use all the logic, but it depends on the design and some routing dense designs may not be able to achieve 100% logic usage.

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Rick "rickman" Collins

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Sorry if my outburst was misunderstood as criticism of any author here in the ng. It was not meant as that, I just was p***ed off by a stream of marketing material from the A-company. Our sales force spends too much time correcting FUD generated by our "friends". It's counter-productive, same as it is between Bush and Kerry. I am dying to explain the many great things in Virtex-4 (soon!), instead of dodging the mudslinging. Peter Alfke

>

Can you help me understand the value proposition of Xilinx versus Altera. I guess this may turn out to be a religious-type of question with die-hard followers (and Xilinx, Altera marketing mixed in). But perhaps if someone can give me some insight into how do you choose between the products of these two companies who seemingly have very similar product lines (well not for the really large and complex FPGAs where Xilinx has unique parts with PowerPC etc).

Although I appreciate the comments so far, I was hoping to evoke some user responses as to why they choose certain parts and under what conditions. I got a good list of metrics from Rick and Thomas to evaluate products on, but still didn't get the true insight into what may be the value propositions of the various FPGA vendors.

Thanks again for all the responses. Sumit

Rather than to try to compare the various products and manufacturers in a vacuum. It might be much more useful to evaluate them in the context of your project. There are some users who have good experiences with one vendor or another and so stick with that one vendor. But many FPGA designers are willing to use any part that is best for a given application.

In general you will find a lot more similarities between X and A than you will differences. The tools are slightly different and the parts are less different. Unless you are doing a design that requires the use of one of the architecture specific features, you will find that your best bet is to design your project to be independant of the chip family so that you can reuse your IP in other products.

Of course if you are designing a high volume device where cost is paramount, then you will want to pick the best chip and optimize the design for that architecture. But many if not most FPGAs don't end up in those sockets.

Ok, all the caveats aside, here is some general info. First, I would not make any significant issues out of the technology or any other aspect of the devices that does not directly impact your requirements. So if you can work with either a Flash/SRAM FPGA or with an SRAM FPGA with a separate Flash chip equally well, then just don't worry about that. BTW, I am pretty sure the Lattice Flash FPGAs also use SRAM. They simply have Flash as a backup and load the SRAM from the Flash. So there won't be a space savings on the die anyway. In fact it will take up more space for several reasons. But all you care about is what price they charge you and you won't know that until you get a quote.

I expect you will find Altera and Xilinx to be pretty much equal for most apps. The Xilinx parts seem to do a bit better in DSP or other heavily pipelined apps. This is due to a couple of features they have such as the SRL16 and the better adders they can make with the extra input on their LUT in arithmetic mode. Whether this is useful to you depends on your design requirements.

I have one socket on a board that Xilinx could not fill. I needed 5 volt compatibility in a relatively low power device. All of the newer (read supported by current software) devices that are 5 volt tolerant have a power on current surge that makes it hard to use in a low power design without extra circuitry. So I ended up using an Altera ACEX (EP1K) device which is only about 3-4 years old. Otherwise their newer chips are mostly similar.

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Rick "rickman" Collins

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.. Perhaps the new Virtex-4 that Peter A. is dying to tell us about also solves the 5V i/o issues ;)

-jg

Hi Sumit,

Yes, X vs. A can turn into a holy war, resulting in frustration on all sides :-)

The easiest way to answer this question is to take your design and compile it in both Xilinx and Altera's tools. We both have freely available versions of our software. Quartus II Web Edition targets Cyclone and Stratix devices so that you can try them out. You'll want to figure out what the cheapest device is that your design fits into and still meets its performance target(s). Don't use the "auto device selection" feature alone -- use it to get an idea, then try picking a smaller device until your design no longer fits. Look at the timing margin you have, and reduce speed grades if possible. You'll also want to look at the data sheets to read about additional features (PLL/DCMs, DSP/Multipliers, memories, etc) that you think you may need.

And in the end, everything comes down to price and availability. All that matters to you is how much the chip will cost you in the volume you need it. And depending on your risk tolerance, you may want to opt for more mature families that have ready availability. For this type of information, you'll need to contact your distributor or FAE/FSE from each company.

Word of caution: Do not use "toy" designs to compare devices or software. Running 16-bit adders or my_little_cpu.v through two tools will not give you an accurate picture of how the devices and software behave on "real" designs.

Regards,

Paul Leventis Altera Corp.

As another poster has indicated, Flash-based devices are just SRAM FPGAs with an integrated Flash IP block. This removes the need for a stand-alone EEPROM/Flash chip for configuration, and can provide a higher bandwidth Flash-to-SRAM connection enabling faster configuration times, giving a "instant-on" capability.

The downside of Flash is that you are stuck on a Flash process. Flash processes are behind standard CMOS processes -- I think I've seen 0.13u Flash talked about somewhere in EETimes, but that's about the best you get these days, and its immature.

We've opted to include an on-die Flash memory in our Max II family of CPLDs. These devices can't really take advantage of cutting-edge process technology due to pad limitation and voltage/power requirements of the target market, so the process "penalty" isn't an issue. And CPLD users want a simple, one-chip solution and instant-on capabilities.

To first order, chips manufactured in smaller process geometries are faster -- our 90 nm Stratix II family is ~50% faster than our 130 nm Stratix family. However, comparing two chips with different architecture (Stratix vs. Virtex II, Cyclone vs. Spartan 3) by using process technology is not going to necessarily give the right answer. For example, we find that Cyclone is significantly faster than Spartan-3, despite being manufactured on 130 vs. 90 nm. This can be due to numerous reasons -- power vs. speed trade-offs, software quality, architectural advantages, etc. The bottom line is you have to try out your design on the chips in question (via the software) to really know.

As for usability/routability, Altera's FPGAs are designed to be routable at

100% utilization (both LUTs and registers) for all but the hairiest of designs. I don't have any first-hand knowledge of the routability of competitors parts and thus will not comment on that.

Regards,

Paul Leventis Altera Corp.

Nice to hear, that newer Xilinx Fpgas allow 100% usage. My experience based on several designs for XC4k to Virtex-E says, that 100% is no practical number. I got routing problems at about 66% doing an XCV1000. As unexperienced beginner I would have said, that a XCV800 should do if I have less than 70% fpga useage on an XCV1000. I mentioned Xilinx, because I can't say a word about Altera or other SRAM based fpgas. But if you choose an fpga, you should have in mind, that you might end up in mess, if you choose a device because marketing told you it's big enough. And reducing the design, just because your design is too big for an device is a very nasty and errorprone task.

bye Thomas

I can assure you that it does not. The problem is twofold, 1) with the thinner oxides that are being used, it gets harder and harder to provide

5 volt tolerance without adding processing steps which drives up the cost and 2) 5 volt tolerance is becomming less and less important as various standards evolve away from the use of 5 volt interfaces.

It has been explained to me several times that in the FPGA world, they had two choices, retain 5 volt tolerance or compete effectively in the high dollar, most current technology markets.

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Rick "rickman" Collins

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Thanks for both your replies Paul. Just one point of clarification. I haven't looked carefully at Lattice's Flash products, but I did look at Actel's products. Actel's Flash devices do not use SRAM at all. Instead, the configuration memory is using Flash cells instead of SRAM cells. You are absolutely right that due to this, they are one process node behind Xilinx/Altera; they will ship 130nm this year.

Ok, I think I am now beginning to see the picture a bit. It sounds like a very daunting task to choose a FPGA device. The free software tools on the web help (have to download and fire those up).

Paul, do you have any idea how many people are using FPGAs for shipping products ? I am wondering if most FPGAs are still being used for prototyping. I remember reading that the Rio MP3 player had FPGAs - were those relatively small FPGAs or CPLDs ? I ask because the large multi-million gate devices seem to be too expensive, both in terms of price and power, to ship in products .. right ?

Thanks again. Sumit

I stand corrected -- I forgot about ProASIC. I'm not sure how efficient a Flash-based cell is vs. a SRAM cell or SRAM + seperate Flash. You've got the pain of having to distribute higher-voltage rail for writing (I think) the Flash and other such overhead. Who knows...

I can make your decision easy -- buy Altera :-)

Many customers are shipping production products using FPGAs, otherwise there's no way FPGAs would be $2.5B+ per year. If you look at Cyclone, the last publicly disclosed numbers said we'd shipped 2M devices. That's either a lot of prototyping, or we've got customers going to production :-) Development, debugging, time to market, mask & tool costs, etc. make ASICs pricey. When you compare to ~$10 FPGAs, you need volumes of 200,000+ for you to even start considering an ASIC. That's a pretty hefty volume. Similar economics hold true for higher-end FPGAs -- the cost per device is higher, but so is the development cost of the equivalent ASIC, especially if you need PLLs + RAMs + fancy I/Os, and you want them to work correctly. If you listen to the quarterly earnings conference call from Altera last month, I think there were some stats on customers in production vs. pre-production, etc.

While consumer is a growing part of our business, much of the FPGA consumption in this area is in things like high-end DVDs, TVs, broadcasting equipment, modems and other such wall-powered devices. Most battery powered devices are tiny, have very low power budgets and strict stand-by current requirements, and have very high volumes. Plus there are enough players and volume in these markets that some company can make (for example) a custom MP3 player chip that will do very well addressing all these concerns and be cheaper to boot. CPLDs still make their way into these devices (everyone needs glue logic), but my guess is there are few battery applications that will tolerate the constant trickle of a 90nm cutting-edge FPGA on board!

Regards,

Paul Leventis Altera Corp.