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Chipscope with custom cable?

Hi.

I'm debugging an issue with my board. The issue surfaces when several components interact, and I'm not able to reproduce the problem in a pure simulation environment.

I heard that Chipscope is a powerful tool for this type of debugging. However, my board has JTAG functionality through a custom interface (not a Xilinx cable).

Is it possible to make Chipscope work with my custom interface? I use Windows and have C/C++ development tools available. I already made an XSVF player to program my board via the custom interface.

Regards, Marc

PS: My alternative is to reinvent the wheel and add a trace buffer and trigger logic to my design, and write a tiny readout tool and a visualization filter. I started with this already, but struggle because if Chipscope were compatible I would save time and get the better tool.

Reply to
jetmarc
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It *IS* possible but currently it means that you need need to reverse engineer the chipscope server protocol and implement your custome server that talks to the your cable. There is partially done impact cable server but I think chipscope needs its own server :(

Antti

Reply to
Antti

I'm not sure if I understand the situation completely, but I can tell you I've used ChipScope with the WildCard-4, which has no JTAG interface; just some general-purpose I/O pins available on an external connector. Some guys I work with got around that problem in the following manner. They replicated the functionality of the BSCAN_VIRTEX4 primitive, making a version that works in the fabric. This version doesn't have to connect to the internal JTAG bus; they connected it to the general-purpose I/O pins instead. Then they modified the EDIF for the Chipscope ICON core to replace the BSCAN_VIRTEX4 primitive with their own. Then they made a custom connector that connected the Xilinx JTAG cable to the Wildcard's port. It looks like it might have been a pain but it certainly helped me to debug. Maybe you could do something similar--you still have to use the Xilinx JTAG cable, but you don't have to connect it to the Xilinx JTAG port. I don't know if this works in your situation. -Kevin

Reply to
Kevin Neilson

ausblenden -

Ha this is the another part of the reverse engineering, this I also have done eg BSCAN fully in FPGA fabric and using the regular io for extra BSCAN JTAG TAP.

but this was not the issue for the OP, he needs custom JTAG adapter to be used with regular FPGA jtag pins

Antti

Reply to
Antti

You can try using Synplicity Identify tool as it supports the custom cables too. Debugging is much more easy as it is done at the RTL level

Reply to
suhasshinde50

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