Chipscope

Hi

I am using the eval version of chipscope 8.2 with a Virtex 2 Pro. I have problem when I configure the FPGA I get the following message

INFO: Found 0 Core Units in the JTAG device Chain.

I have looked at Xilinx answer record 19337 and everything appears to b ok, although it is for ver 6.3

Does anyone have any ideas?

Cheers

Jon

Reply to
maxascent
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Are you using chipscope to configure the FPGA ? I have sometimes faced the same problem, it works when I configure using Impact then use chipscope.

Hope this helps.

Reply to
quark01

maxascent schrieb:

sometimes it is possible to have ICON generated for wrong FPGA family that might pass synthesis, but then ChipScope will not see the cores.

Antti

Reply to
Antti

Thanks for your replies. It turns out that I needed to first program wit impact and then start chipscope. Seems a bit stupid to have to do this bu at least it works

Jon

Reply to
maxascent

maxascent schrieb:

there is one difference with chipscope namly it does not auto-fix the startup clock as impact does, so you need to generate the .bit file with startupclock jtagclock, but I guess you had that right.

well the chipscope and impact use a little different jtag algorithm, meaning sometimes both work, sometimes only one, I have also seen situations where impact cant be used but chipscope succeeds to program the fpga!

so as usual, if one doesnt work then try the other :)

Antti

Reply to
Antti

Yeah, indeed. I've found it easiest to use the Core Inserter, rather than instantiating all of the ChipScope stuff in the VHDL (makes it easier to change what you wish to monitor, too). After the Core Inserter does its thing, I re-implement, create a new PROM file and re-program the EEPROM with Impact, then re-configure the device. Then ChipScope finds the core, no problem.

I know this all shouldn't be necessary, but that's the only way I get it to work.

-a

Reply to
Andy Peters

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