Hello -
I am trying to write a custom peripheral using Verilog and version 8.1 of the Xilinx tool kits (ISE and XPS). It is my understanding that only the user_logic component of the peripheral can be developed in Verilog, not sure if that is correct or not. Anyway, I used the XPS create custom peripheral tool to create the skeleton of the peripheral. I was careful to select the option to generate the user_logic stub in Verilog rather than VHDL. At which point I received a dialog box warning that the Verilog stub will be limited capabilities, I went ahead with the Verilog stub. Then, using the ISE, I added the required ports etc to the top level VHDL code and added my Verilog code to the user_logic component.
Once I confirmed all of the syntax was correct, I went back to XPS and attempted to import the existing peripheral back into the project. I selected the standard options. I also selectd the 'MIXED' option for the question asking which HDL languages were used to implement the peripheral.
I also realized that for some reason the create custom peripherial wizard did not seem to include my user_logic module in the PAO file. So I manually edited the file and added the following line:
lib opb_DVIReceiver_v1_00_a user_logic Verilog
I was a bit surprised that I had to do this, because in the past, I've created customer peripherals in VHDL and found that the user_logic entry was automatically placed into the PAO file. Anyway, I completed the import custom peripheral wizard and then added the IP to my XPS project. I specified the addresses, and tied in the required ports etc. All SEEMED well. However when I tried to generate the bitstream, I received the following error:
ERROR:NgdBuild:604 - logical block 'opb_dvireceiver_0/opb_dvireceiver_0/USER_LOGIC_I' with type 'user_logic' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'user_logic' is not supported in target 'virtex2p'.
I have searched the net for information regarding this error message and found several mentions of it, however none of which seemed to help.
There MUST be some information somewhere that explains how to import custome peripherals that make use of a user_logic component written in Verilog, but I have yet to be able to find anything. I would GREATLY appreciate it if someone out there could point me in the right direction.
Thanks in advance,
Jim