Can anyone explain "cannot currently create a parameter of type" compilation error message?

I forgot to say that my code is in Verilog!

Not that there is anything wrong with asking here, but you might try asking in comp.lang.verilog too. None of these groups are overly active, but there are a few good posters in each of them. So ask around.

I'm not a Verilog guy at all or I would try to answer. However, this question seems rather complex.

esult), each of which operand is a single bit, which returns a logical one in (result) if (left) has the same value as (right), and returns a logical zero otherwise. My code is:

specs[ 1].inHigh = 3;

specs[ 2].inHigh = 0;

specs[ 3].inHigh = 3;

specs[ 4].inHigh = 6;

ix].inHigh]);

x].inHigh]);

Equals circuit than this; again this is a simplification of a problem I'm h aving in more complex code. Anyhow, I run the Icarus simulator on this and get:

dGc.sv

which was defined at: ModGc.sv:7.

arameter (specs) is declared? Any information anyone can give me on these c ompilation errors would be greatly appreciated.

I copied this into the stuff I'm working on and ran it through VCS just to see if it compiles. It does if I remove the keyword "localparam" on the of fending line 16. A parameter is a constant, in any case, and I don't think it can be modifed after it is declared. I didn't see if the code actually works, but it at least compiles if you remove that word.

I hope this is just for simulation, because synthesizers are not going to l ike a lot of this, such as the "initial" block, and may even balk at struct ures and enums.

e:

(result), each of which operand is a single bit, which returns a logical on e in (result) if (left) has the same value as (right), and returns a logica l zero otherwise. My code is:

; specs[ 1].inHigh = 3;

; specs[ 2].inHigh = 0;

; specs[ 3].inHigh = 3;

; specs[ 4].inHigh = 6;

ix].inHigh]);

n Equals circuit than this; again this is a simplification of a problem I'm having in more complex code. Anyhow, I run the Icarus simulator on this an d get:

ModGc.sv

e' which was defined at: ModGc.sv:7.

parameter (specs) is declared? Any information anyone can give me on these compilation errors would be greatly appreciated.

o see if it compiles. It does if I remove the keyword "localparam" on the offending line 16. A parameter is a constant, in any case, and I don't thi nk it can be modifed after it is declared. I didn't see if the code actual ly works, but it at least compiles if you remove that word.

like a lot of this, such as the "initial" block, and may even balk at stru ctures and enums.

Why would synthesis balk at the initial block? I've been looking at this a nd many document the fact that an intialization is the "right" way to speci fic the configuration start up state, although they don't use an initial bl ock.

module top (q, d, clk, reset); input d; input clk; input reset; output q; reg q_reg = 1'b1; always @(posedge clk)begin if(reset) q_reg

localparms (and parameters) values can only be set during definition. You cannot modify them within a procedural block (initial block in your case) as you've shown.

There are tricks your can do if you want to use procedural code to calculate parameter values. But not within procedural blocks as you've done.

Regards, Mark