Hi!
I encounter a strange problem that I haven't been able to solve for several days of hard work. I'm using a Spartan2 in order to achieve dynamic partial reconfiguration, but my design doesn't work even if it passes through all the steps successfully.
I think that the problem comes from my bus macro (released by Xilinx with XAP 290) that it isn't correctly included in my design after the very first mapping. My design includes two modules and therefore only two bus macro (one for each direction), but one of them is divided in two part (two wires are mapped in respect of the macro, but the two others are mapped in another position).
Grégory Mermoud snipped-for-privacy@epfl.ch Master Student Computer Science Departement I&C Faculty Swiss Federal Institute of Technology - Lausanne