I get this message when i synthesize my code "you may be trying to describe a RAM in a way that is incompatible with block and distributed RAM resources available on xilinx devices, or with a specific template that is not supported"
I have this signal sram_data which is of type array(0 to 255) of std_logic_Vector(7 downto 0). I am assigning values to each element sram_data(N) inside a state machine and this message pops up when i synthesize. any comments on how i can fix this?
thanks