block ram and bmm files

What is the motivation for exporting it back to XPS? What is the nature of the data2mem errors?

Maybe I had a similar but different problem that you have. I had code located in external flash. I modified the bmm file and added some stuff similar to Xilinx answer record 16577. I added the modified bmm file to the ISE project, but did NOT include the elf file. I let the tool crank out a bit file, then I manually invoked data2bram using the tag option, which IIRC indicates to data2ram, which block to load up. If I did not do this, it would try to load up the external reference and "error out".

-Newman

Oops, I included the original bmm file from xps into project_nav, and manually invoked data2bram using the tag option. I created a new bmm file with the external flash reference to get a mem file which I had to modify, to load into Modelsim.

- Newman

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Answer record 16577 seems to be a little old. I also referenced dev.pdf, which contains more information concerning data2mem. It is located under the Xilinx install directory.

- Newman

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Hi Newman,

I am fairly new to the embedded side of the v2ps. From what I understand, the typical design flow for an embedded design is as follows:

1.) Create base design in XPS (jtag, ppc, bram, c program) 2.) build libs and bsps in xps 3.) export to projnav 4.) make any hdl changes/additions you want to interface the ppc with the fpga 5.) make the bitstream 6.) import the updated bitstream and bmm file into xps 7.) compile your c code 8.) then run update bitstream to stick your c code in the brams 9.) download to fpga.

So step 2 creates a bmm file for you, that has all the memory locations used by the ppc design. When you export that to projnav, and add in your own bram (or rom in this case, whatever), you need to edit the bmm file and specify the location of the bram? This is what I'm unsure of: how to specify this. If I try to edit it as I mentioned below, when i import it back to XPS, and update the bitstream, this is the error message I get:

Running Data2Mem with the following command: data2mem -bm implementation/system_bd -bt implementation/system.bit -bd TestApp/executable.elf tag pattern_rom plb_bram_if_cntlr_1_bram -o b implementation/download.bit

WARNING:Data2MEM:80 - ADDRESS_SPACE or ADDRESS_MAP tag name 'pattern_rom' was not found. Some data may have not been translated.

ERROR:MDT - Data2Mem generated errors during execution make: *** [implementation/download.bit] Error 1 Done.

I've read the data2mem docs, and saw that there is some way for it to create the bmm file for you, but I'm not exactly sure how to do this.

--Matt

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You don't need to. When you implement the design in ProjNav, "map" and "par" assign the BRAMs to the various memory regions, and you get an additional bmm-file (that's the one with _bd added to the filename). In this BMM the locations are already specified, according to how the tools implemented everything. If you change anything here it won't work as expected (if at all).

So in step 6 what you need to do is import the bram_bd.bmm file, not the original .bmm created in step 2.

But I'm not sure how it works if you add more BRAMs in your toplevel in ProjNav if you have to initialize those as well...

cu, Sean

Step 2A is build all user applications. At this point I usually have the executable.elf. I either stay in XPS, or if I go to ISE and stay in ISE. You say you are rather new to XPS. Well you are not alone because everytime Xilinx ups the rev of EDK, it is like starting all over again. I'm currently at EDK 6.2. If you look at system_bd.bmm, I suspect that you will find a tag named plb_bram_if_cntlr_1. Do you find a tag named pattern_rom? If not, why does the warning surprise you? Is the initialization for the pattern_rom located in the executable.elf? If not, what is the purpose of running data2mem with a tag of pattern_rom. Is the pattern_rom accessed by the PPC, if not, then why go back to XPS. Is the pattern_rom independent of the PPC, can you get by with the regular bram initialization style, then data2mem would seem to be superfluous for the pattern_rom. I would look at the plb_bram_if_cntl_1_bram section of system.bmm and system_bd.bmm. If you can understand the relationships between the elf, implementation, and bmm files, then you should be able to figure out what to do with your pattern_rom.

-- Newman

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I

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1) importing/exporting to XPS is generically bad approuch, try to create ISE toplevel and include the XPS system as module there 2) the .BMM file you need to create yourself and thats sort of pain 3) you can not use XPS to update your non EDK block ram created and included in ISE/coregen

ok here is what is needed todo

1) create .BMM reads the docs, its doable 2) open the design in floorplanner, look up complete instance names of the BRAM block 3) add all the [2] in .UCF manually locking all the bram instances used by your block 4) rerun synthesis, now the block ram is in known locations 5) update the .BMM to inlcude the locked down positions 6) after the edk memories are updated (XPS) run data2mem using the .BMM you made and your .MEM file for the contents of your block ram

as of today I know no other way of doing it. It should be possible (it actually is) to add .BMM files to ISE project but I had no luck so far with that approuch.

NB: DATA2MEM was (at least few service packs ago) not able to update the par ity bits, so if the 70bit wide memory is using parity bits it maybe cant be updated at all with data2mem

Antti