Beginner VHDL questions

Say in an if-statement I assign a value by: "temp

Reply to
James Wu
Loading thread data ...

Reply to
Martin Thompson

Reply to
Brian Drummond

Why a component takes more slices in Virtex4 than the same one in Virtex.

Reply to
jmoui

Hi James,

You might want to ask VHDL questions in the comp.lang.vhdl group instead/as well.

Cheers,

-Ben-

Reply to
Ben Jones

I assume since you say this is in an "if" statement that this is inside a process (sequential code). If the process is combinatorial (i.e. sensitive to all input signals used by the process), then you will get a latch, since the temp signal has to be remembered from previous executions of the process whenever it is not assigned. To avoid latches in combinatorial processes, don't use combinatorial processes! Failing that, ensure that every conceivable execution path through the process results in an assignment to the signal. Default, unconditional assignments to all signals at the beginning of the process are the best way to ensure this.

If, on the other hand, this is inside a clocked process, then temp will be a registered version of fpga_input. If it is inside a conditional if (besides the clock if), then the condition becomes the clock enable on said register. If the condition is true only once, the register will be enabled only once also.

Finally, if this is a concurrent assignment statement (and necessarily not within an if statement in a process), then temp is just wired up to fpga_input.

Andy

James Wu wrote:

Reply to
Andy

Thanks guys, I keep forgetting what the FPGA actually does.

Reply to
James

James wrote: "Thanks guys, I keep forgetting what the FPGA actually does."

I used to get confused, too. So I made a mental picture of a PLD (CPLD or FPGA) as a board full of digital logic chips (gates and flip-flops, but _no_ one-shots!). An HDL (VHDL or Verilog), in effect, describes how those chips are wired. With these two things in mind, I usually avoid the newbie pitfalls.

BTW, I recently bought a great VHDL book "RTL Hardware Design Using VHDL". It teaches RTL design and VHDL, and assumes you know what AND, OR, and NOT gates are. It has lots of examples. I think I got it @ Amazon. HTH

-Dave Pollum

Reply to
Dave Pollum

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.