So I need some help getting started with programmable logic and VHDL.
In the past all I have done in the programmable logic area are 16V8 and
22V10 PALs.I actually feel kind of stupid about the simple questions I am about to ask, since it isn't like I don't know a lot about electonics. I have a BSEE and in the past I've designed DSP boards and motor controllers that control hundreds of amps and make electric forklifts able to lift thousands of pounds. Pretty fun stuff actually.
But I am stumped by a few simple things with VHDL, Xilinx ISE 7.1, and the Xilinx XC9536XL experimenter board I am using.
I've gone through ALDEC's Evita VHDL tutoral end to end and I think I've learned the basics of the language.
So my project was to write a program to take a step and direction input and output the proper sequences to control a stepper motor. But the logic output sequences I got didn't make sense, so I decided to walk before I run and just programmed up a couple very simple programs. More on that later.
So what I've got is an XC9536XL board I bought on eBay. I connected a
4 position dip switch with 4 pull up resistors connected so that when you turn on a switch the input is grounded and read as a zero. Turn off the switch and the pullup pulls high and it's read as a one. I know this works because I can measure the correct logic signal right at the CPLD.I also connected 4 LEDs. The 4 LEDs are each connected to Vcc through a current limiting resistor. The other end of each LED is connected to an output of the CPLD. So sending a logic zero to the output should sink current and turn on the LED. The LEDs work because I can unplug them from the socket header and connect each to ground and the LED lights as expected.
The first "simple" program I wrote was to read the switch inputs and output them to the LEDs, using the following VHDL code in Xilinx ISE
7.1:---------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Test1 is Port (SWITCH_IN : in std_logic_vector(3 downto 0); LEDS_OUT : out std_logic_vector(3 downto 0)); end Test1;
architecture Behavioral of Test1 is begin LEDS_OUT