Basics FPGA

You can't go wrong with the $99 Xilinx Spartan 3 kit and free WebPack software. I actually got my kit from Digilent who make them for Xilinx and paid an extra $20 for the larger -400 Spartan 3 chip.

Leon

There are two main flavors of HDL for programming FPGAs, Verilog or VHDL. You could try Verilog first, since it has a lot of free tools available, including free compilers and simulation tools.

GPL Cver (a free verilog compiler):

GTKWave (free waveform viewer for GTK):

With the above two free tools you could learn how to program in Verilog. Then you can move on to commercial tools such as Xilinx's ISE and EDK to do real FPGA synthesis.

Good luck!

Hey Leon Thanks for the reply. I think I also emailed you directly using my other ID for a private tution on FPGAs. Let me know if you can do that.

You can go through this very good introductory tutorial on PLDs/FPGAs.

Thanks for the info. But I had a question and pardon my ignorance here. Some one also suggested that I buy Xilinx Spartan 3 kit and free WebPack software. What is the use of that? Is that used to actually program FPGA chip? As far as I understand i can use the tools you suggested to practise simulations and then go towards the hardware to program the chips.

Thanks for the response. I have already come across that article. What I am looking for is how do I start working on it once i figure out the basics. For example to learn C++ i need C++ tutorials, a C compiler and a computer. similarly what all is required to get started on this. Also what all can I get for free. Will Hua Zheng suggested some simulation tools to learn verilog. Do I also need any hardware? thanks

You only need an editor and simulator to get started. Once you know how to write and simulate HDL code for synthesis, you can try it out on hardware. Until then, all you can do with hardware is run the canned demos and flash the LEDs.

-- Mike Treseler

You don't need hardware to learn HDL. Cver + GTKWave will simulate most logic.

The Spartan 3 kit comes with a prototyping board with a Spartan 3 FPGA. The software that comes with the kit lets you synthesize your design into the FPGA on the board. You should definitely get something like that if you want to get a feel of what the logic you wrote can do in real hardware.

And you are right, you can practice with simulation tools first (this lets you see the inner-workings of your design, not just the output).

The steps are

Create the design:

1) edit design source files 2) create test bench files - these files simulate other parts of the system your FPGA goes in, provide stimulus. For trivial designs, the you might get away without testbench and just use the simulator to apply stimulus. 3) simulate your design in the testbench environment. Go back to step 1 until it appears to work right. The simulator is seldom provided for free by the fpga vendor, although xilinx supplies a free but hobbled version of modelsim, which is very good.

4) use a logic synthesizer to convert your design source files into a structural/schematic implementation of the logic. This tool is usually supplied by the vendor, but sometimes 3rd party tools are even better.

5) use place and route tools to map the schematic onto the cells of a particular fpga. Timing constraints tell the tool how fast your design must be. This tool is always supplied by the fpga vendor. 6) after verifying that timing constraints were met, load the results of 5 into the fpga, watch the blinkenlights.

Most fpga vendors provide free gui type programs that tie all these things together. You can run all the tools from command line also. I prefer doing steps 1-3 "stand alone".

There are some cases where simulation is called for after step 4 and 5, but that is rare for simpler designs.

Since the other posts concentrate on Verilog, I'll give you some pointers on VHDL. Don't want to start up the old Verilog vs. VHDL discussion, just want to give you both options. Since I don't know Verilog, I can't comment on what is easier to learn if you're just getting started.

There's a VHDL-tutorial on

(available in English), which is OK for starters, I think. On you can find an on-line syntax reference, which is pretty handy.

As editor for your source files I recommend Xemacs (

), which has excellent support for syntax highlighting, TAB-completion, easy generation of the most commont VHDL constructs and so on, and of course it's free (BTW, it supports Verilog as well).

For simulation, just download Xilinx' free ISE WebPack from

, which includes a limited release of ModelSim (I think it's restricted in simulation speed and the number of lines your source files can have, but it should be enough to get you started).

Should you decide to go into this area of work, ModelSim is very likely to be the simulation tool you'll be using, so you might as well just learn the ropes with that instead of starting with another tool and then having to switch to ModelSim later (BTW, WebPack as well as ModelSim support both Verilog and VHDL).

ISE WebPack also includes a tool for synthesis, which I think is a good thing for people starting out with the whole FPGA thing. I find that especially for people coming from a software background, it's good if they see from the beginning how their coding style affects the hardware that is generated.

Simulating everything until it does what it's supposed to do is one thing, but sooner or later you also have to develop a feeling for how the tools map your code to the hardware.

So I think it's not a bad idea to just run synthesis on your code and have a look at the schematic it generates from time to time. As long as it's a smaller project and not too complicated, that can teach you a thing or two as well.

Another thing the others haven't mentioned is the fact that you can work with FPGAs without using a HDL at all. Smaller, simpler projects can be entered through schematic entry. This gives you the most control of what will end up in hardware, but can of course get very tedious...

HTH, Sean

Blinking leds and displaying stupid messages on the 7-segment things is more fun than reading pages of $monitor() outputs !

MB

--
Michel BILLAUD                  billaud@labri.fr
LABRI-Université Bordeaux I     tel 05 4000 6922 / 05 5684 5792
351, cours de la Libération     http://www.labri.fr/~billaud
33405 Talence  (FRANCE)

Hey,

First start writing small designs and try to simulate and verify them using some free simulations tools in the web. Xilin also offering some evaluation versions of simulation tools. Then you should synthesize your and design followed by place & route and Static timing analsys (STA). Then you require hardware to actually verify your design in FPGA. Until STA you can manage with free web tools but to test your design in FPGA you need hardware and no company is provinding hardware for free.

--Joe

Also, get "Design Warrior's Guide to FPGA" - a very good intro to the technology, workflow etc. There's probably 6-9 good books on Verilog and VHDL - for quick start get something tailored toward practical world design of synthesizable logic.

Here's another excellent site:

30 mins of browsing through it will tell you

85% of what you need to know about FPGAs

Reading a waveform of 100Hz is easier on your eye than LEDs blinking 100 times a second.