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basic doubts about chipscope pro

Hi all, The design that I am working on is becoming increasingly difficult to debug and so I am trying to use chipscope pro. I tried some basic modules to familiarize myself with the tool and I have some basic questions about it. Can I capture more than 16384 samples? Can I capture more samples if I have a device with more gates than with lesser gates. i.e say XC3S200 Vs XC3S1500? I do not understand the concept of trigger ports. Suppose the whole design is based on the clock input to the fpga and the fpga is used as a memory controller, then what are the trigger ports? And should the output be triggered? I understand these are very basic questions and I tried to use google and the user guide to find the answer to this. If there are any basic documents that I can refer then please point me to it. Thanks Subhasri.K

Reply to
Subhasri krishnan
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16k is mx depth :( it is limited by the max address size of the BRAM eg chipscope is not using enables, to increase address range
Reply to
Antti

The number of samples is limited by how many free RAMs you have in your device. I believe that the ChipScope docs make that point perfectly clear.

You trigger on whatever signals interest you. You might want to trigger when the memory controller writes to a particular address.

If you want to see what happens when an output changes to a particular state, sure.

Try reading Agilent's guides to using logic analyzers.

-a

Reply to
Andy Peters

Subhasri,

I believe you are confusing triggering with registering. Assuming you want to start acquision on memory write you could use WR as your trigger signal. The chipscope however allows for much more complex trigger events, but you should remember to connect to the trigger ports whatever signals you want to be a part of the triggering condition.

/Mikhail

Reply to
MM

Reply to
Subhasri krishnan

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