back-annotate pin location with xilinx webpack 5.2

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I wrote some constrains (indicating simply the side where I want the
signals). I  want the tools to use these constrains in place-and-route
phase, and then I want to back-annotate the pin assignmet in the
constrain file (to lock pin locations for the future change).
Unfortunately "Back-annotate pin location" exit with this error:

ERROR:Pin2Ucf -     pin2ucf found that the UCF file for this design
already have
      some pin locking constraints. Since pin2ucf will not overwrite  
   constraints, please check the UCF file and remove those  
constraints before
   trying pin2ucf again. You could also delete    the UCF file before
   again. To get a listing of all    possible conflicts among
constraints for
   this design please    check the pin2ucf report file: filename.lck

constrain file is simple:
NET "addr_bus<0>" LOC = "B" ;
NET "addr_bus<1>" LOC = "B" ;
NET "addr_bus<2>" LOC = "B" ;
NET "addr_bus<3>" LOC = "B" ;
NET "addr_bus<4>" LOC = "B" ;
NET "addr_bus<5>" LOC = "B" ;
NET "addr_bus<6>" LOC = "B" ;
NET "addr_bus<7>" LOC = "B" ;
NET "data_bus<0>" LOC = "B" ;
NET "data_bus<1>" LOC = "B" ;
NET "data_bus<2>" LOC = "B" ;
NET "data_bus<3>" LOC = "B" ;

I tried with or without PINLOCK section but the result is the same.

in the report there is:

Pin name conflicts on the nets
NET Name                            New PIN            Old PIN
addr_bus<0>                              N7                  B
addr_bus<1>                              P8                  B

I also tried to delete the constrain file (or delete its contents)
after first pass, but in this case it restart from place-route and
discard all previously allocated pin.

any idea?


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