AWGN in VHDL

For random numbers try this package:

MPJB

Hi,

Sometimes back I had posted the same query on Random Number Generator(RNG).I am reproducing one of the responses that I received , courtesy, Michael Chan.Hope this helps.

" General linear feedback shift register based RNGs are probably the easiest to implement on an FPGA. Below is some code I wrote the other day that generates 32-bit random numbers(based on TT800 RNG).

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library IEEE; use IEEE.STD_LOGIC_1164.all; entity LFSR is port( Clk : in STD_LOGIC; D : in STD_LOGIC; Q : out STD_LOGIC; F : out STD_LOGIC ); end LFSR;

architecture LFSR of LFSR is signal SR : STD_LOGIC_VECTOR (25 downto 1); begin process (Clk) begin if Clk'event and Clk = '1' then SR

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Macie,

Xilinx offers an AWGN core that includes the VHDL source code. See the following link for further details:

Regards,

Ed Hemphill

MACEI'S wrote: