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Avnet/Memec V4FX12LC proto card and SysGen

Hi, Has anyone used this card with Xilinx System Generator to do hardware in the loop simulation. I can not find a board description file for it in the form that the System Generator wants. There is a utility in System Generator called xlSBDBuilder;or something like that helps one create the needed files to do hardware in the loop simulation over the JTAG, but you need to know the pinouts of all the ports used on the card.

If someone has already done this I'd greatly appreciate a copy of the needed files.

Thanks,

CTW

Reply to
cwoodring
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CTW,

This board was used with hardware-in-the-loop with an older SysGen (7.1, maybe?). You can contact your local Avnet FAE and they can get you the files.

Bryan

cwoodr> Hi,

Reply to
Bryan

Bryan, Thanks for the reply, but I did contact Avnet support and let's just say they were less than helpful. They directed me to the design resource page for the card. I didn't see a hardware in the loop design there but I'll look again. I've used the card with the EDK to download a test project and debug it with the JTAG but I am pretty sure the Simulink/System generator debugging is different.

Thanks again,

CTW

Reply to
cwoodring

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