Aurora UCF problem

I'm having trouble getting some lines in a UCF file to be accepted by ISE. The lines are:

NET Inst_rio_fo2_top/aurora_module_i/lane_0_mgt_i/RXRECCLK PERIOD=6.4 ns; NET Inst_rio_fo2_top/user_clk_i PERIOD = 6.4 ns HIGH 50 %; INST Inst_rio_fo2_top/aurora_module_i/lane_0_phase_align_i/phase_align_flops_r* AREA_GROUP="PHASE_ALIGN_FO2_GRP"; AREA_GROUP "PHASE_ALIGN_FO2_GRP" RANGE=SLICE_X26Y72:SLICE_X27Y73; INST Inst_rio_fo2_top/aurora_module_i/lane_0_mgt_i LOC=GT_X1Y1;

which is for an Aurora core on a 2VP7. Much of this is copied from the sample Aurora stuff generated by the Core Generator. Has anyone else had any issues with this or can anyone see anything obvious. The error occurs on the

INST Inst_rio_fo2_top/aurora_module_i/lane_0_phase_align_i/phase_align_flops_r* AREA_GROUP="PHASE_ALIGN_FO2_GRP";

line when it's claimed it could not find the instance of the phase align flops but which are definitely there.

TIA,

Rog.

Reply to
Roger
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It seems that the lines in lane_0_phase_align_i (phase_align.vhd) : attribute KEEP_HIERARCHY:string; attribute KEEP_HIERARCHY of RTL: architecture is "true"; are the source of trouble. If these are comented, the Translate process runs OK. Does anyone know what's going on here?

Thanks,

Rog.

Reply to
Roger

It seems that the lines in lane_0_phase_align_i (phase_align.vhd) : attribute KEEP_HIERARCHY:string; attribute KEEP_HIERARCHY of RTL: architecture is "true"; are the source of trouble. If these are comented, the Translate process runs OK. Does anyone know what's going on here?

Thanks,

Rog.

Reply to
Roger

I use Aurora v2.4 and in my case I have no problem with the constraint you mention.

My understanding is that the keep_hierarchy constraint is there to make sure that the flops to be constrained in the ucf file stay whithin a known hierarchy path. So your 2nd post is strange. I would have thought that the opposite would happen.

You can use fpga editor to see what is the correct hierarchy to target your flops in the ucf.

You could also try to add a *, as in: INST aurora_module_i/lane_0_phase_align_i/*phase_align_flops_r* AREA_GROUP="PHASE_ALIGN_0_GRP";

Patrick

Reply to
Patrick Dubois

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