Asynchronous Priority comparator

Hi Vish, In VHDL you can use the IF-ELSIF Statement.

IF A = B THEN --do something ELSIF B = C THEN -- do something else, but only if a=b didnt match before ... ELSE -- do some default stuff if nothing else fits END IF;

Depending on the deepth of this structure your design will become quite big and slow though. But the structure creates the priority dependance and if your compares are kept simple (only = and /=) and need only a small ammount of bits it may fit to your needs.

have a nice synthesis eilert

snipped-for-privacy@gmail.com schrieb:

Hi Vish, If you are wanting to detect the location of the most significant bit then you may want to use a "propagate kill" circuit that maps very well to the FPGA carry chain (at least in Xilinx anyway). I won't attempt to describe it here, have a read of the following paper - page 6 in particular.

I think floating point arithmatic often needs to find the MSBit in the normalise process so maybe a google on FPGA floating point designs may find something.

Out of interest, why are you trying to create an "asynchronous system"? Research topic? I believe synchronous design techniques are more appropriate if you are targetting an FPGA implementation....

backhus wrote:

Andrew,

THanks a lot for the l> Hi Vish,