Hello I've done some work in ASIC Verilog design, but not that much in FPGA design. SO, I wonder what are the mani differences between these 2 types od design. I found a multimedia document about this on Xilinxs website, but I cannot read it on my Linux box. Do you know a web site which could give me a brief overview of the most important differences?
By the way, I thought it was possible to download Xilinx 6.1 for free on their website, but I dind't find the link.
Thank you