i request some of you guys who worked or having knowledge on imlementation of ARM core with MBA bus in FPGA.Basically we are designing two FPGAs in single card with the functionality given below.
we are are trying to implement ARM926 IP core and USB2.0 IP CORE in one of the Virtex4 FPGA. Due some constraints we are planning to implement some other IP CORES in an another FPGA with ARM interface to this IPCORE via AMBA bus from the 1st FPGA. Now the issue is that if there are any signals of AMBA bus which have any latency issues if we connect the AMBA bus from one FPGA to Other FPGA with some IP core(Like PCI express and ethernet MAC).
please direct us in this issue. Feel free to ask if any other informaton is required from my side.
In this configuration you may find that you can only run the AHB in quite low clock frequency. AHB design require signals to be propagate within 1 cycle. If you connect the AHB across two FPGAs without breaking up the signal delay, your AHB propagation path can be very long CPU Bus interface FPGA #1 bus matrix pad circuit board delay pad FPGA #2 bus matrix AHB slaves on FPGA #2
If your company has the ARM Amba Development Kit (ADK), there should be a Synchronous 32-bit AHB-AHB bridge (1:1). That can be used to break up the delays into multiple paths.
Path 1:CPU Bus interface FPGA #1 bus matrix Ahb2Ahb, Path 2:Ahb2Ahb pad circuit board delay pad Ahb2Ahb, Path 3:Ahb2Ahb FPGA #2 bus matrix AHB slaves on FPGA #2
regards, Joseph
____________________________________________________ Joseph Yiu ARM Holdings Ltd
110 Fulbourn Road Cambridge CB1 9NJ United Kingdom
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