I am reading some papers about algorthms implementation. I noticed they like to compare the synthesis area of the fixed-point implementation. I wander where they find the area report for the implementation. I only see the slice percent report. I am using the Xilinx ISE. I want to know where to generate the area report. Any comment is welcome.
Area report can be found in synthesis report and Map report. Look at FPGA design summary.
Are they giving the area in square mm? If so they are not talking about FPGAs, but ASICs or custom chips. The area group reports from ISE are still given in slices, etc, not in square mm.
If they are talking about area group reports from ISE, you have to apply an area group constraint to the module/component you want to get the report for. See the constraint guide documentation for more information on how to do this.
Regards,
John McCaskill
I see now. Thank you.
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