Anyone use Xilinx ppc405 profiling tools?

Does anyone use the profiling tools with the Xilinx ppc405?

I am trying to profile code on the ppc405 in a Xilinx XC2VP4. It works for a simple test, but when I try the real code, it fails.

The call stack seems to be getting corrupted. When I look at the failure, the link register points to the instruction after mcount is called (the profile code at the beginning of the function) so at the end of the function it jumps back to the beginning of the fuction, ad infinitem.

I am using EDK7.1sp2. profile is using PIT for timer. If someone else is getting this to work, I can keep trying. Otherwise, I may give up.

Alan Nishioka

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Alan Nishioka
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I recently considered the 405 in its AMCC (formerly IBM) incarnation. This is the buggiest CPU I have seen. If the core you have (this is of course a big IF) has the same errata, it is hopeless. The worst bug I saw was one which said you can use the data cache in write through mode, otherwise memory can get corrupted... this has of course the implication that for every write to memory the thing will do a cacheline write to the SDRAM or whatever, full 32 bytes write. And there were many other bugs as well... I was also told the DMA engine would not burst the SDRAM accesses, but this may be not core-realted so you may be immune to that issue. OTOH, Ihave had experience with the 603e core (in the 82xx chips) and it works fine for me.

Dimiter

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Alan Nishioka wrote:

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dp

Thank you for your response.

The Xilinx ppc405 seems to work fine. My application runs great without the profiling code, but loops forever when -pg code is added (I admit I did not actually wait forever...)

Since the link register seems to be getting overwritten, I think the problem is in the support software, but if someone else has gotten this to work, I can rule this out.

Alan Nishioka

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Alan Nishioka

I figured it out. Profiling the ppc405 doesn't work using edk7.1. The code generated is broken. Using edk8.1 it works fine.

Since nobody responded, I am still wondering; Is anybody using the Xilinx ppc405? (Or perhaps I they all don't read news on the weekends)

Alan Nishioka

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Alan Nishioka

Yes the AMCC 405 hard-core in the Xilinx FPGA's is the 'buggy 405' readt the powerPC errata docs from Xilinx. I was terrified when I discovered tha the PPC hardcore has so my so old and known bugs still present in V4 silicon.

surprisingly - after being terrified by the amount of bugs, I was again positivly surprised to see how easy it is to get PPC linux running on V4 !!

the PPC errata in V2Pro/V4 exist, but for real issues there are either patches already or they are not relevant in most design

Antti

Reply to
Antti

Well they obviously do exist, if you call not using cache copyback mode a "patch". This is a major feature of the PPC processors, not having it (having all pages in write-through or cache-inhibited mode) means slowing the CPU a lot, probably several times. Like I wrote before, every single memory write will burst 32 bytes to memory; if this is a 100 MHz SDRAM this will take > 120 nS instead of a single CPU clock cycle - which will typically be below 5 nS. Not that this makes the part unusable, of course - 120 nS per write is still a lot faster than many MCUs which are still in production, it just does not live up to what a PPC processor is about.

Dimiter

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Antti wrote:

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dp

Alan,

We were having issues with the EDK profiling tools for ppc405 also. And we were/are using 7.1. Now I am a little anxious to get back to the lab and see if an upgrade to 8.1 makes things go more smoothly. Thanks for your posts. Oh, and in response to one of your questions: lots of folks are using the ppc405, but I am not sure how many are using the Xilinx profiling tools (for reasons you have already discovered!).

Joey

Reply to
Joseph

Alan,

I recently finished my Masters Thesis on Algorithm Acceleration in FPGA. Part of my research and experiementation was running some algorithms on the PPC405 core in V2PRO. I used both ISE/EDK 7.1 and EDK 8.1 (and then developing IP in the FPGA and attaching to PLB). I got software profiling to work using PIT and I used PLM BRAM memory for storing the profiling information. Initially I ran into a lot of problems, but eventually got it to work on 7.1. I was using latest ISE SP and EDK SP for 7.1. Most of my research was infact done on ISE/EDK

7.1, and towards the end I repeated same experiements using EDK 8.1. Profiling worked on EDK 8.1 also for PPC406 using -pg gcc and setting PIT for software profiling in software platform settings.

Another benchmark I used was a OPB timer that was reset and measured before and after the algorithm started and stopped.

Something noteworthy (and probably makes a lot of sense) is the EDK8.1 generated a lot faster software (EDK 7.1 and 8.1 was compared for -O0,

-O1, -O2, -O3) on the -O2 and -O3 gcc options, but this is probably most likely do to the fact they are using a newer version of GCC in EDK

8.1. Alan, If you have any specific questions you can email me, and I can tell you my experiences using sw profiling in 7.1. It was quite a hassle but eventually worked.

-Joel

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Joel

Thank you for your response.

I finally got profiling working with edk 8.1. But since you said edk

7.1 worked, I went back and tried it again, and it worked too!

I think I mixed up the compilers since I have edk 6.3 and edk 7.1 installed on the same computer.

Alan Nishioka

Reply to
Alan Nishioka

Just to follow up, we installed 8.1 and tried profiling again and it worked exactly as it should (the SDK gave us spinning, 3-D pie graphs and everything!). We followed the same steps as we had for 7.1, which didn't work for us. I think the moral is to use 8.1 if you are going to do any profiling.

Reply to
Joseph

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