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ANNC: New Boundary-Scan Software

Dear All,

Please have a look at Scanseer

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a new software for 'manual' boundary-scan testing.

Scanseer does not generate SVF tests, but it allows to: * monitor pins with no interference to normal device operation, * manipulate with pins signals in EXTEST or INTEST mode to test PCB interconnections or internal chip logic, * display pins waveforms, * display graphical package outline with color coded pins values.

And last but not least, it's a nice to use and user friendly software.

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Reply to
skswrus
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Does it tun on Unix/Linux?

--
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Reply to
Uwe Bonnes

Does it run on Unix/Linux?

--
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Reply to
Uwe Bonnes

Does it run on Unix/Linux?

--
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Reply to
Uwe Bonnes

No, currently only Windows. But it's written using cross-platform GUI library with the idea to be easily ported to Linux if there will be a market for it.

Reply to
skswrus

You should be aware, that while the FPGA-world is mostly PC and Windows based, traditionally most ASIC design applications run on Solaris and other Unix variants only, with Linux gaining ground.

Kolja Sulimma

Reply to
comp.arch.fpga

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