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Re: Advice to a newbie
On 5/27/2016 10:46 PM, snipped-for-privacy@ieee.org wrote:
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Thanks for the link, I will look at it this weekend, every little bit helps.

  I watched a series of YouTube videos and there is hope, a small  
project but not idiot simple and done by hand, it didn't seen as alien  
as I thought it would be. The person basically designed the hardware and  
then proceeded to generate the program with explanation of what he was  
doing, of course the devil hides in the details but still it looked  
logical and not difficult. So after the weekend I will try it out. This  
weekend I will be following a seminar on the ep8080 CPU, a high  
performance clone of the 8080 CPU not only does it run at higher speed  
but most instructions execute in one clock cycle, it should be interesting.

--  
Cecil - k5nwa

Re: Advice to a newbie
On 5/27/2016 2:00 PM, Cecil Bayona wrote:
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This does not directly address your stated issues, but there is a  
workshop Saturday.  Notable is that it will use the same starter kit you  
have.  I believe you can participate via the Internet.  It might be  
interesting to you since it is about CPU design.  Here is a post I made  
about this in another group.

Dr. Ting will be leading a workshop on using a Lattice FPGA to implement  
an emulation of the 8080 instruction set which will run Forth.

http://www.meetup.com/SV-FIG/events/229926249/

I believe you need to be a member of Meetup to see this page.  I'm not  
sure but you may need to be a member of the SVFIG meetup group as well.  
There is no charge to join either.

--  

Rick C

Re: Advice to a newbie
On 5/27/2016 10:10 PM, rickman wrote:
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Thanks, I already joined, that is the reason for buying the Lattice  
Brevia2, I will be watching the meeting, but the video is supposed to be  
available afterwards so I can take my time afterwards and go through the  
course at my pace.

I loaded Diamond on a Virtual Windows 7 partition and setup the ep8080  
project and noticed that the software warned of a clock issue, Dr Ting  
mentioned that he was having issues where if he made changes things  
would break so that clock issue might be related.

I been looking at some video courses and they had a lot of information  
on translating a set of hardware into VHDL code, so over the next few  
weeks I will be trying the lessons to become familiar with VHDL. In the  
meantime I will also be looking for books on VHDL and how to use it to  
create hardware.

I have done hardware design some time back and I still like doing so but  
I'm hoping that once I become more familiar with FPGAs I can do more  
experimenting as buy once and try out many times is perfect for  
experimenting.
--  
Cecil - k5nwa

Re: Advice to a newbie
On Friday, May 27, 2016 at 11:10:26 PM UTC-4, rickman wrote:
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Thank you for posting this information, Rick C.  I've watched some of
the content that's available on YouTube from the event.  It's very
interesting.

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On 5/28/2016 6:37 PM, Rick C. Hodgin wrote:
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Thanks for the info, but I was aware of the workshop and bought the  
Brevia2 so I could participate in the workshop, I missed part of the  
afternoon session as an emergency cropped up but I was planning on later  
in the week watch the video and follow along. with the video I can stop,  
wind back and take my time in following along. Previous to the workshop  
I loaded the software and got it working, so my goal is to go over the  
explanations on what the different sections do.

--  
Cecil - k5nwa

Re: Advice to a newbie
On Saturday, May 28, 2016 at 7:37:10 PM UTC-4, Rick C. Hodgin wrote:
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I went to Lattice's website and also bought a Brevia2 development kit.
I was able to download their Diamond software and get a license.dat file,
and I found that someone from the Meetup posted Ting's project files
online:

    https://github.com/DRuffer/ep8080

I have been able to get the project loaded, but I haven't gotten to the
part where it synthesizes yet.  Still going through the videos:

    Morning session, a lot of ISA and architecture review:
    
https://www.youtube.com/watch?v=rhgCrnF036Y


    Afternoon session, development, design, and synthesis:
    
https://www.youtube.com/watch?v=vLzEFU2GvYc


DRuffer was able to get the Forth code to run as well, and he includes
his working JEDEC file:

    https://github.com/DRuffer/ep8080/tree/master/ep80

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On Monday, May 30, 2016 at 11:54:11 AM UTC-4, Rick C. Hodgin wrote:
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I may be missing an obvious link, but if anybody knows where I can get
the PPT files used in these presentations, please pot a link:

    ep8080 architecture morning sessions:
    Feb.27.2016:  
https://www.youtube.com/watch?v=-DYKuBmSGaE

    Mar.26.2016:  
https://www.youtube.com/watch?v=XO0VqKhsPQE

    Apr.23.2016:  
https://www.youtube.com/watch?v=s9cnnPiQtn8


Thank you in advance.

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On Monday, May 30, 2016 at 12:03:28 PM UTC-4, Rick C. Hodgin wrote:
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Also, if anyone has a block diagram or logical component layout of some
kind, one which shows the internal components and how they are all hooked
up through this ep8080 design, please post that info as well.

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On 5/30/2016 11:41 AM, Rick C. Hodgin wrote:
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I would also be interested in those items, there are several nice  
looking soft CPUs available for use with Forth , the common thread among  
is lack of documentation.
--  
Cecil - k5nwa

Re: Advice to a newbie
On 5/30/2016 1:02 PM, Cecil Bayona wrote:
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The best way to learn about the structure of the ep8080 would be to draw  
a block diagram from the VHDL code.   I looked at the code when I  
debugged the problem I found and it is not so complex.  There are  
separate registers for the user accessible registers as well as the  
internal registers like the PSW.  There is a process for the control  
signals enabling the registers and controlling the various other  
functions in the CPU such as multiplexers and carry bits, etc.  There  
are the multiplexers and the other data path logic.

To draw the block diagram, I would follow the data path from the  
registers backwards to the sources.  I believe you will find there is a  
small multiplexer on the input of each register and two larger muxes  
controlled by the source and destination fields of the instruction  
opcode.  I can't say much about the rest, I didn't dig in to understand  
it all.  Once you have mapped out the data path, you can trace the  
control flow through the control logic to understand how the opcode is  
interpreted.

--  

Rick C

Re: Advice to a newbie
On Monday, May 30, 2016 at 4:49:05 PM UTC-4, rickman wrote:
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That's not good advice for everyone.  I have dyslexia, for example, and
have a very difficult time comprehending written text.  And since I don't
know VHDL, I was hoping to go the other way from your suggestion, to be
able to look at a block diagram and understand the connectivity in that
design / drawing form, and then look at the VHDL code and teach myself
its verbose form that way.

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On Monday, May 30, 2016 at 5:19:36 PM UTC-5, Rick C. Hodgin wrote:
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]>That's not good advice for everyone.

Am not the world's fastest or best VHDL coder, this is what I do:

Write a description of what you want to do.
  In the case of a soft core, include the instruction set & formats, rational, implementation decisions, ...

Do a spreadsheet with one or more rows for each instruction.
  Create columns for anything involved in the implementation
    Mnemonics, their binary, registers accessed, registers modified, calculations, ...
    For instructions with multiple clocks, either a set of columns for each clock or multiple rows.

Choose some naming scheme for the signals and registers

Write the VHDL.
  You can optimize it later
    (merging adders that have similar inputs optimizes well)
  And only write what you are ready to test (using a short program)
  Now prefer not to do a data flow diagram
    (tends to result in too many signal names)
  Track resource utilization as instructions are coded

Test the VHDL both in simulation and on the FPGA evaluation board.

Jim Brakefield

Re: Advice to a newbie
On 5/30/2016 9:34 PM, snipped-for-privacy@ieee.org wrote:
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You forgot timing analysis.  I prepared a presentation on test benches  
for Dr. Ting's workshop, but I wish I had included a mention of static  
timing analysis.  I believe Ting talked another time about the design  
not running at 50 MHz as he had hoped but ran at 25.  This is an issue  
that could be explored by a static timing analysis most efficiently.  
Trying to analyze timing paths by post route simulation is very labor  
intensive.  Trying to debug anything in a real chip is even harder and  
should not be done until simulation and static timing analysis have  
wrung out the design as much as possible.  That is the background that  
introduces the need for good test benches.

--  

Rick C

Re: Advice to a newbie
On 5/30/2016 11:34 PM, rickman wrote:
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When I setup the project and compiled it, it gave warning on issues with  
the clock possibly being delayed in some sections of the circuit, so  
it's likely that he has timing issues.

--  
Cecil - k5nwa

Re: Advice to a newbie
On 5/31/2016 12:41 AM, Cecil Bayona wrote:
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I looked and don't see any real problems with the clock circuit.  In  
VHDL a clock buffered results in a delta delay which can mess up a  
simulation.  It won't hurt a real circuit since the buffer won't be  
implemented in logic.  It can *really* mess up a simulation though.

There is also an inversion of the clock which I don't understand, but  
again, it likely also won't be implemented in an FPGA since they  
typically have hardware to select the clock edge.

--  

Rick C

Re: Advice to a newbie
On Monday, May 30, 2016 at 9:34:18 PM UTC-4, snipped-for-privacy@ieee.org wrote:
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Thank you for your input, Jim.  It's appreciated.

It's hard for me to operate in a theater which uses a lot of words.  I can
do it, but it takes a lot of effort and is very mentally taxing.  I also
make a lot of mistakes in reading (and subsequent comprehension) like that.
It's really quite amazing sometimes what I read compared to what's really
there.  Sometimes they are completely separate meanings.

On my designs, I often go into a spreadsheet or GIMP and begin the design
with separate components (using shapes, color blocks, outlines, etc.),
which provide visual cues (rather than words) for that reason.  My brain
can isolate and identify the separate components much better that way.  It
winds up being much easier for me to understand things in images and their
related diagrams than in those which just have words.

Some diagrams are also confusing though.  Typically it's those being mostly
words, or words in certain fonts (depending on how they were created), but
not all of them.  And even then they're usually better in some ways at least.

-----
I'll track it down.  If it doesn't exist, I may skip the ep8080 and go to
another CPU ... possibly the 6502 as it's had a lot of reconstruction to
create its entire gate layout:

    http://www.visual6502.org/
    http://www.visual6502.org/JSSim/index.html

And they have a high-speed C gate simulator which is a soft 6502 that
runs at about 1/4 speed on an 8-core machine:

    https://github.com/mist64/perfect6502

I may also just start with my Oppie-1 design:

    
https://github.com/RickCHodgin/libsf/blob/master/li386/oppie/oppie-1.png
    
https://github.com/RickCHodgin/libsf/blob/master/li386/oppie/oppie1/debo-1-actual.png
    https://github.com/RickCHodgin/libsf/blob/master/li386/oppie/oppie1/cpp_simulation/oppie1_lasm/test1.asm
    https://github.com/RickCHodgin/libsf/blob/master/li386/oppie/oppie1/oppie1.v

It's a very simple core with discrete stages which all operate in a single
clock cycle, so it's very straight-forward.

-----
I do like the Lattice Diamond software.  It's awesome actually.  Very fast.
Nice simulator.  I prefer it to Altera's Quartus II so far, but that may
only be because I don't yet know how to use Quartus II well enough.

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On Tuesday, May 31, 2016 at 12:51:13 PM UTC-4, Rick C. Hodgin wrote:
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I received the Lattice board today.  I'll begin working on something this
weekend.  Looking forward to getting a basic circuit to cycle through the
on-board LEDs when on-board buttons are clicked.

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On Friday, June 3, 2016 at 12:00:52 PM UTC-4, Rick C. Hodgin wrote:
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Received:

    http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/LatticeXP2Brevia2DevelopmentKit.aspx

I am wanting to apply logic to this LED process, but I'm thinking there may
be some analog issues that I need to consider.  For example, when a button
on the board is clicked, I assume there is some jitter time, such that if it
were sampled at a MHz frequency it would record jittery on/off signals for
a ms or two until the contact was made solid, and the same for releasing.

As such, any logic which samples the buttons, for example, must include
things like identifying the first high signal, and then either sampling
the high/low ratio over periods of time to determine if it's still high
or low, and then using that value after the sampling period has expired,
or wait until the high signal persists solidly for something like 10ms,
and then consider that to be a single press event, and then wait for it
to go low again for something like 10ms before concluding it is actually
a release event.

Sound about right?  Or, do boards like this automatically handle that for
you so you have a direct digital input that has already sampled out those
peculiarities in some way, so you have a solid press and release events
when they switch from high to low, and low to high?

-----
Also, I am thinking about hooking up a speaker to make sound.  I am
thinking there is no way to control volume using this method, but only
the frequency, short of signaling out through multiple sets of pins
which are wired to a single speaker, such that pins 0 are full voltage,
pins 1 are slightly resisted, pins 2 are slightly more resisted, pins 3
are heavily resisted, and pins 4 are almost completely resisted, such
that whenever a volume setting is made, it drives pins 0,1,2,3,4 or none,
as needed.

Sound about right?

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On Friday, June 3, 2016 at 2:09:22 PM UTC-4, Rick C. Hodgin wrote:
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Someone named "Andy Bennet" sent me an email with an invalid return email
address wherein "he" told me to go with God, as God is the knower of all
things.  My reply was:  "LOL!  That's about where I'm at because I doubt
I'll get any help from the group."

We'll see.  If not, it's okay.  All is forgiven.

Best regards,
Rick C. Hodgin

Re: Advice to a newbie
On 6/3/2016 1:09 PM, Rick C. Hodgin wrote:
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I like that board, you can implement simple CPUs in it for a low cost.

This is a link to a video of FPGAs, this one is lesson 1, on lesson 2  
they take a button and debounce it, the purpose of the project is to  
count a series of pulses on the LED based on pushing a button.

--  
Cecil - k5nwa

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