Now I am very happy I got this working, PLL always did cost me many hours of thinking and tinkering... This takes a 50 MHz clock, and a horizontal trigger of about 1 to 5 clocks high (purified H sync in). It generates a 32KHz sync pulse for the monitor. The stability seems very good. So anyways I got a picture from the linedoubler, only BW for now. Also some test on timebase correction worked.. Thought I share this with you, as it is the first thing needed for a line doubler, and could be used for other things too I am sure.
Input is htrigger64, output is test_h, clock is real_clock. Never mind the reset, it will run continuously. It will go wild without input, and kill your monitor perhaps.. so have some fail safe circuit.
// start frequency multiplier parameter MULTIP = 2;
// 2h oscillator reg [10:0] reload; reg test_h; reg [15:0] th_count; reg th; always @(posedge real_clock) begin case(th_count) 0: begin test_h = 0; th = 1; th_count = 1; end 10: begin th = 0; th_count = 11; end 200: begin test_h = 1; th_count = 201; end reload: begin th_count = 0; end default: th_count = th_count + 1; endcase end
// incoming line length detection reg [15:0] llen; reg [15:0] cllen; reg hflag; always @(posedge real_clock) begin if(htrigger64 == 1) begin if(! hflag) begin cllen = llen; llen = 0; hflag = 1; end end else begin llen = llen + 1; hflag = 0; end end
// frequency discriminator reg [10:0] sh; reg [7:0] lcnt; reg [10:0] ccnt; always @(posedge real_clock) begin if(htrigger64 == 1) begin if(test_h2 == 0) begin if(sh > 0) sh = sh - 1; end else begin if(sh < 400) sh = sh + 1; end
// hehe, the trick reload = (cllen / MULTIP) + sh; end end // end frequency multiplier