5V signals at Spartan-IIE inputs

Hi all,

I overlooked this during design and the board has already been manufactured. I have a XC2S300E connected to inputs of a 5V chip. The outputs of that chip going back to the FPGA pass through level translation. What I overlooked is that those 5V inputs of the chip have internal pullups (I beleive 5k)...

So, my question is how bad is this situation? The max FPGA input voltage is obviously exceeded but the current is limited to 1mA...

Thanks, /Mikhail

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MM
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Xilinx says that the Spartan2E series is 5V tolerant if you limit the input current to ~10mA (IIRC). They propose the use of serial limiting resistors but I guess the solution is irrelevant as long as the current is within limits.

-- Regards, Andras Tantos

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Andras Tantos

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