5V inputs with series resistor on Spartan-3

I was looking for information on driving Spartan-3 inputs from 5V CMOS signals using series resistors, and eventually found answer record 19146 which covers this in detail. Executive summary: for LVCMOS33 input with Vcco min/max of 3.0/3.45V and 5V+/-10% CMOS signal, use minimum 263 ohms series resistance. That answers my question. But...

Before I found that, I found XAPP 429, on interfacing 5V to CoolRunner-II CPLDs. On page 3, it says "A simple series terminating resistor is NOT an acceptable solution to interfacing 5V signals. In this situation, the current applied to the pin is not the offending factor. Since the cumulative damage to the gate oxide impedance is caused by voltage, merely limiting the input current does not protect the oxide."

Why is the Spartan-3 different than the CoolRunner-II in this regard? XAPP 429 goes into great detail on the gate oxide, but doesn't make any mention of clamp diodes in the input pad structures. Did the CR-II really not have clamp diodes on the inputs? Or were the CR-II clamp diodes rated for significantly less current than those of the S-3?

Without some understanding of why such different advice is given for the CR-II and S-3, I'm reluctant to use the series resistor approach.

Eric

Reply to
Eric Smith
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Eric,

Spartan 3 has clamp diodes that always prevent the voltage on the pin from being more than a diode drop above Vcco (or below ground).

So, if Vcco is 3.3V, and the diode drop is ~ 0.5V at the current thru the 270 ohms, then the max V is 3.8V, well below the abs max limit of

4.05V in the data sheet.

But, take care, as if you have Vcco = 3.45V, then you are getting uncomfortably close to the 4.05V abs max limit.

As it turns out, the characterization work we have done has shown that the nmos gate is very robust, and the pmos gate is the one limited to the no greater than 4.05V restriction (in .25u IO used by V2P, S3, and V4). In order to stress the pmos gate, you would have to have a voltage below ground, AND a high Vcco! So for the 5V and a resistor case, even if you had 3.45V Vcco, it still does not represent a reliability issue with the nmos gate oxide.

I have stated here before, that the pmos stress >4.05V results in a leakage of ~ 10uA over time, and a weakening of the pmos output transistor by as much as 10%. This is not affected or accelerated by temperature. If the IO is always used as an input, then you don't care about the driver becoming weaker over time. If the input is thru a 270 ohm resistor from a 5V CMOS output, you probably also don't care about

10uA of input leakage. But, the leakage is an indication of gate oxide damage of the pmos pullup, so we can not recommend operating it under these conditions.

Aust> I was looking for information on driving Spartan-3 inputs from 5V CMOS

Reply to
Austin Lesea

And CoolRunner-II do not?

Reply to
Eric Smith

Thats correct. CoolRunner-II devices do not have clamp diodes...

Thanks, Mark

Eric Smith wrote:

Reply to
Mark Ng

If I want to drive a Spartan 3 input from 5V TTL (not CMOS), such as an SN74LS14, do I need a series resistor, and if so, what value? The data sheet gives a typical output voltage of 3.4V at -0.4 mA (which is the recommended maximum Ioh). They don't give a maximum Voh. Since it's bipolar, it's obviously less than the supply rail. I suppose I could size the series resistor as if it were a 5.5V CMOS output, but I'd prefer to use a lower value if it can be guaranteed not to exceed the maximum current of the S3 clamp diode.

Thanks, Eric

Reply to
Eric Smith

Eric,

I would run a spice or IBIS simualtion of the driver into an open.

Then you would know.

Aust> Aust>

Reply to
Austin Lesea

Is 74LS still available? Why would you use it and who still makes it?

Reply to
General Schvantzkoph

In theory, you are probably OK electrically. In practice you need to watch the production to make sure no one does a 'Heck, 74LVC14 (etc) are the same as 74LS14', replacement :), plus LS14 have to be getting near EOL....

-jg

Reply to
Jim Granville

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