Hi I have to perform punctured convolution encoding at 3/4 rate on Verilog. Ca n anyone provide me the source code to perform puncturing? I am able to per form convolution coding. Don't know how to implement puncturing on it.I hav e to maintain an output data rate of 100 MHz.
OK. It's not even close to April, so this isn't an April fool's joke.
What part of removing one of every four bits are you having trouble with?
-- Tim Wescott Wescott Design Services http://www.wescottdesign.com
perform punctured convolution encoding at 3/4 rate on > Verilog. Can anyone provide me the source code to perform puncturing? I > am able to perform c onvolution coding. Don't know how to implement > puncturing on it.I have to maintain an output data rate of 100 MHz. OK. It's not even close to April, so this isn't an April fool's joke. What part of removing one of every fou r bits are you having trouble with? -- Tim Wescott Wescott Design Services
haha..well actually i have performed puncturing..sorry for the incomplete p ost.but that is at different output rate approach. I want to know if there is method in which i can maintain same rate for input and output without ha lting the data and just obtain a punctured code. Though my code works just fine. I have PLL clock generation core limitation in my design. So the pro blem arises.
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