Hi,
in C programming,it's easy to get a negative value of any variables, as minus -xn; in FPGA, suppose it's 16bit 2's complement number format, how to compute a negative value of a given number 'xn'? I mean, there must be a solution to get the result easily, not "reverse every 16-bits first,and add
1" to get the result. I am confused about this, there must be something wrong with my understandings.Sun lei.
Well, that's what you have to do if you want to form the 2's complement of a number. Depending on the application, you may be able to get away with less. For example, if you're computing A minus B, you invert the bits in B, put A and B into an adder, and inject a 1 into the adder carry-in to get the increment--no need for an extra adder.
Or you could always write c = a - b and let Verilog do the work.
There's more on binary arithmetic here:
Bob Perlman Cambrian Design Works
Hi,
SunLei schrieb:
The sollution of inverting every single bit is easy in (V)HDL (unlike to C). a
-xn works the same way in VHDL as it is does in C. The signal (or variable) xn being defined to be the appropriate type:
signal xn, something: signed (15 downto 0); -- Example 1 signal xn, something: integer range -32768 to 32767; -- Example 2
....
something
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