Hi! I have implemented the Dallas/Maxim 1-Wire master DS1WM (version v1.100) in a Spartan3A. It works fine most of the times, but in some implementations it just won't work. Changing something silly in another part of the FPGA (like the version number that we have stored in a register) usually helps and in the next implementation it works again.
Moreover, even in an implementation where it seems to work most of the time, it sometimes hangs at start-up. In those cases, resetting the design and staring over seems to do the trick.
I haven't had the time to dig into what actually goes wrong in these cases but before I spend too much time in the lab I thought I'd check in the library. In my design, the control and status registers of the DS1WM are mapped into the register map of a small MCU and in doing so I had to do away with the bi-directional data bus, so I made some modifications to the original code as supplied by Dallas/Maxim. The modifications were trivial so I don't beleive they are able to cause the problems. Since the module is clocked by the same clock as the rest of the MCU interface (a 48MHz global clock covered by a PERIOD constraint in the .ucf file), timing problems should not pass undetected.
Anyone with experience of the DS1WM, any pit-falls that you know of that I might have fallen into? Serching this group for DS1WM does not return any hits, and 1-Wire is almost as meager...
Regards, /Lars
P.S. Remove the obvious in you want to email me directly. D.S.