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There are 81392 individual articles here that are part of 14993 discussions
Please see below the list of the most recent and the best rated articles in Field-Programmable Gate Arrays

The most recent discussions

Beginer's FPGA with SERDES


October 21, 2017, 6:49 pm

Some hams want to work with FPGAs to generate high speed PN sequences in the GHz range. LFSR designs are about as simple as you can get in an FPGA. The only trick is getting the resulting signa... Read more »

Request for an example in Verilog


October 18, 2017, 9:39 am

Dear All, I am a student with primitive experience in verilog. I have a small verific ation task for a top module. I have simplified the task in the below descri ption, so that you can give me a q... Read more »

Do you want to live outside of time in Heaven?


October 17, 2017, 6:49 pm

Do you want a body like the angels? Young, strong, beautiful, never getting tired, never aging, never wearing out, but always at the absolute top of its game. Remember what it was like when you w... Read more »

Think God can't forgive your sin?


October 12, 2017, 3:07 pm

Here's a message for those who think the sin they've done is too big for God to forgive them. You underestimate the power of God, and of what Jesus did at the cross, if you think your sin is too w... Read more »

UART receiver


October 11, 2017, 2:06 pm

Hi, I am working on UART receiver. As of now, I am stucked at http://paste.ubuntu.com/25720292/ I could not find a proper hardware writing style to continue with line 14 the overall hierarchy : http... Read more »

A teaching that's worth hearing


October 10, 2017, 1:22 pm

This is Pastor Mac, a guest pastor at a church in Hawaii I listen to each week. He's appeared on the channel as a guest pastor a handful of times that I've seen, but his sermons are always so powe... Read more »

Artix-7 boards


October 7, 2017, 12:16 pm

Has anyone had any experience of using these : http://www.robotshop.com/uk/cmod-a7-35t-breadboardable-artix-7-fpga-module.ht ml?gclid=EAIaIQobChMIkqXI9rje1gIVxZkbCh2l_AkhEAEYASAAEgLo_PD_BwE They a... Read more »

A request for each of you


September 25, 2017, 12:27 pm

To my fellow Usenet groupies: I come before you today with a request for each of you. I ask you to give it an ear and ponder it in your heart. Consider it for a time each day and think about wha... Read more »

duty cycle of clock divider


September 21, 2017, 12:32 pm

http://www.fpga4fun.com/MusicBox1.html The frequency is 440Hz, as expected, but the output duty cycle is not 50% a nymore. The low level goes from counter=0 to counter=32767 (when bit 15 of count... Read more »

logic scope coding


September 16, 2017, 9:13 am

Could anyone give general comments on https://github.com/promach/internal_logic_analyzer/tree/development/rtl ? Is my coding approach too software-centric ? Read more »

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The best rated discussions

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5

VHDL BFMs and VVCs for AXI4-Lite, Avalon-MM, UART, I2C and SPI - for free ...


UVVM - the new VHDL verification methodology is a very good way to structur e your VHDL testbenches - and to make easily understandable, maintainable, extendible and reusable testbench architectur... Read more »

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5

Lowest Power Design in an FPGA


What is the lowest power design you have done in an FPGA or CPLD? There have been some very low power devices on the market for a number of years now. I assume there have been some designs that... Read more »

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5

ICTP Open Hardware Initiative – Invitation to part icipate in an open-surve...


Dear Colleagues / Friends We would like to invite you to participate in an important survey regarding an open FPGA Hardware initiative by the International Center for Theoretical Physics (ICTP - UN... Read more »

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5

Software for FPGA-based PC scope


Hello, Although I am a newbie in FPGA design and have experience only with some simple designs so far, I am thinking of some more ambitious project and want to design a FPGA-based PC scope working in... Read more »

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5

lowest-cost FPGA and CPLD


I heard that Lattice Semiconductor Corporation boasted they were providing the lowest-cost FPGA and CPLD solutions, not sure if the news was true. Could anybody confirm it? If so could anybody give m... Read more »

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5

Call for beta users for Sigasi integration with Altera Quartus


Hi everybody, I am Philippe Faes, founder of Sigasi. Sigasi sells a design entry and code comprehension tool for VHDL. Many users of Altera Quartus have asked us if Sigasi plugs in to Quartus. We hav... Read more »

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4

Job - Promotion - 2D/3D Bildverarbeitug - FPGA


Stellenausschreibung - Echtzeit-2D/3D Bildverarbeitung ------------------------------------------------------ Verg. Gr. 13 TV-L zu besetzen. Schwerpunkt der Forschungsarbeiten liegt auf dem folge... Read more »