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FPGA board on ebay


April 15, 2019, 2:35 pm

If anyone is interested I just got round to putting up a nexys Video artix-7 board on ebay. This is a private not trade sale. https://www.ebay.co.uk/itm/Development-Board-Nexys-Video-Artix-7-FPGA-... Read more »

BITSLIP STATE MACHINE


April 1, 2019, 11:12 am

Hi, I am trying to design a state machine for bitslip function but simulations dont seem to be correct. I cant figure out where the bug is. here is the code and test bench. module bitsliplogic( ... Read more »

Replaceme EPROM by CPLD/FPGA

  [ 2 ]
March 28, 2019, 12:28 pm

We have a product that includes a small parallel OTP memory. These devices get very hard to get and no easy alternative is available that fits in the very small available space. A PLCC32 EPROM will... Read more »

TCS34725 Basys3 VHDL


March 26, 2019, 2:39 pm

Hi I am trying to use TCS34725 to identify Green and Red Colors, it has I2C interface and i could not find any I2C interface about this and i am not capable to write a protocol code what should I do ... Read more »

High-level synthesis

  [ 2 ]
March 21, 2019, 6:40 pm

It's been about 3 years since I've done any *serious* FPGA work. I used mostly VHDL or sometimes my own Matlab scripts to create automated VHDL files. I would like to know if anyone has used High-le... Read more »

Xilinx M1 Pad file


March 19, 2019, 7:29 pm

Is there anyone that has a description of the Xilinx M1 Pad file syntax? An example file would do as well. Best Regards AP Read more »

Tiny CPUs for Slow Logic

  [ 2 3 4 ]
March 19, 2019, 12:13 am

Most of us have implemented small processors for logic operations that don' t need to happen at high speed. Simple CPUs can be built into an FPGA usin g a very small footprint much like the ALU bl... Read more »

Color sensor with BASYS3 VHDL


March 18, 2019, 6:28 pm

Hi, I need to make a circuit which does the following thing: When it sees a red object it will send output 0 until it sees a green objec t (like a well colored cubic toy), after it sees green it wi... Read more »

Green/Red detector and button controlled car (BASYS3/VHDL)


March 13, 2019, 8:39 pm

Hi, I am a 2nd-year ee student, and I need to make a term Project. With BAS YS3 by using VHDL. My purpose is constructing a car which can be controlled with the buttons o n BASYS3 ( I think I need... Read more »

Anyone have files from the old Xilinx FTP?


March 13, 2019, 2:45 am

Hi all, Looking for someone who has FTP files from 1997 for the XACT Foundation v6.0.2 update. Web Archive has the files listed here: https://web.archive.org/web/19970616112705/http://www.xilin... Read more »

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The best rated discussions

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5

VHDL BFMs and VVCs for AXI4-Lite, Avalon-MM, UART, I2C and SPI - for free ...


UVVM - the new VHDL verification methodology is a very good way to structur e your VHDL testbenches - and to make easily understandable, maintainable, extendible and reusable testbench architectur... Read more »

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5

Lowest Power Design in an FPGA


What is the lowest power design you have done in an FPGA or CPLD? There have been some very low power devices on the market for a number of years now. I assume there have been some designs that... Read more »

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5

ICTP Open Hardware Initiative – Invitation to part icipate in an open-surve...


Dear Colleagues / Friends We would like to invite you to participate in an important survey regarding an open FPGA Hardware initiative by the International Center for Theoretical Physics (ICTP - UN... Read more »

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5

Software for FPGA-based PC scope


Hello, Although I am a newbie in FPGA design and have experience only with some simple designs so far, I am thinking of some more ambitious project and want to design a FPGA-based PC scope working in... Read more »

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5

lowest-cost FPGA and CPLD


I heard that Lattice Semiconductor Corporation boasted they were providing the lowest-cost FPGA and CPLD solutions, not sure if the news was true. Could anybody confirm it? If so could anybody give m... Read more »

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5

Call for beta users for Sigasi integration with Altera Quartus


Hi everybody, I am Philippe Faes, founder of Sigasi. Sigasi sells a design entry and code comprehension tool for VHDL. Many users of Altera Quartus have asked us if Sigasi plugs in to Quartus. We hav... Read more »

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4

Job - Promotion - 2D/3D Bildverarbeitug - FPGA


Stellenausschreibung - Echtzeit-2D/3D Bildverarbeitung ------------------------------------------------------ Verg. Gr. 13 TV-L zu besetzen. Schwerpunkt der Forschungsarbeiten liegt auf dem folge... Read more »